Inventor
WU SHIANLING
US18 patents
⚠️ This page may combine multiple inventors who share the name “WU SHIANLING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SYNTEST TECHNOLOGIES INC
9 patentsUS7412637B2Aug 12, 2008
Method and apparatus for broadcasting test patterns in a scan based integrated circuit
SYNTEST TECHNOLOGIES INC62 citations97
US7945833B1May 17, 2011
Method and apparatus for pipelined scan compression
SYNTEST TECHNOLOGIES INC29 citations92
US7231570B2Jun 12, 2007
Method and apparatus for multi-level scan compression
SYNTEST TECHNOLOGIES INC21 citations92
US7512851B2Mar 31, 2009
Method and apparatus for shifting at-speed scan patterns in a scan-based integrated circuit
SYNTEST TECHNOLOGIES INC39 citations91
US7779322B1Aug 17, 2010
Compacting test responses using X-driven compactor
SYNTEST TECHNOLOGIES INC12 citations84
US7996741B2Aug 9, 2011
Method and apparatus for low-pin-count scan compression
SYNTEST TECHNOLOGIES INC11 citations83
US7721172B2May 18, 2010
Method and apparatus for broadcasting test patterns in a scan-based integrated circuit
SYNTEST TECHNOLOGIES INC11 citations83
US7590905B2Sep 15, 2009
Method and apparatus for pipelined scan compression
SYNTEST TECHNOLOGIES INC13 citations83
US7783940B2Aug 24, 2010
Apparatus for redundancy reconfiguration of faculty memories
SYNTEST TECHNOLOGIES INC0 citations49
WANG LAUNG-TERNG
5 patentsUS8522096B2Aug 27, 2013
Method and apparatus for testing 3D integrated circuits
WANG LAUNG-TERNG38 citations93
US8458544B2Jun 4, 2013
Multiple-capture DFT system to reduce peak capture power during self-test or scan test
WANG LAUNG-TERNG7 citations83
US8161441B2Apr 17, 2012
Robust scan synthesis for protecting soft errors
WANG LAUNG-TERNG14 citations82
US8418100B2Apr 9, 2013
Robust scan synthesis for protecting soft errors
WANG LAUNG-TERNG6 citations81
US8091002B2Jan 3, 2012
Multiple-capture DFT system to reduce peak capture power during self-test or scan test
WANG LAUNG-TERNG4 citations70