Inventor

GUPTA AARTI

US46 patents

⚠️ This page may combine multiple inventors who share the name “GUPTA AARTI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GUPTA AARTI

NEC LAB AMERICA INC

System and method for modeling, abstraction, and analysis of software

Method for the static analysis of concurrent multi-threaded software

Iterative abstraction using SAT-based BMC with proof analysis

System and method for monotonic partial order reduction

Modeling and verification of concurrent systems using SMT-based BMC

Reachability analysis for program verification

Accelerating high-level bounded model checking

Efficient modeling of embedded memories in bounded memory checking

Program analysis using symbolic ranges

Symbolic reduction of dynamic executions of concurrent programs

Efficient distributed SAT and SAT-based distributed bounded model checking

Path-sensitive analysis through infeasible-path detection and syntactic language refinement

Software verification

Computer implemented method of high-level synthesis for the efficient verification of computer software

Efficient SAT-based unbounded symbolic model checking

System and method for feedback-guided test generation for cyber-physical systems using monte-carlo

Disjunctive image computation for sequential systems

Control structure refinement of loops using static analysis

Probabilistic model checking of systems with ranged probabilities

NEC CORP

Verification of scheduling in the presence of loops using uninterpreted symbolic simulation

Property specific testbench generation framework for circuit design validation by guided simulation

Method for design validation using retiming

SAT-based image computation with application in reachability analysis

Partition-based decision heuristics for SAT and image computation using SAT and BDDs

Efficient approaches for bounded model checking

Fast error diagnosis for combinational verification

KAHLON VINEET

System and method for generating error traces for concurrency bugs

Accelerating model checking via synchrony

Model checking of multi threaded software

Fast and accurate static data-race detection for concurrent programs

Using pushdown systems for the static analysis of multi-threaded programs

SANKARANARAYANAN SRIRAM

Program verification through symbolic enumeration of control path programs

Mining library specifications using inductive learning

System and method for dynamically inferring data preconditions over predicates by tree learning

Control structure refinement of loops using static analysis

NEC USA INC

System for combinational equivalence checking

Dynamic detection and removal of inactive clauses in SAT with application in image computation

Method for using complete-1-distinguishability for FSM equivalence checking

MAEDA NAOTO

Scope bounding with automated specification inference for scalable software model checking

Interprocedural exception method

WANG CHAO

Dynamic model checking with property driven pruning to detect race conditions

Partial order reduction using guarded independence relations

IVANCIC FRANJO

Systems and methods for model checking the precision of programs employing floating-point operations

CADAMBI SRIHARI

Software verification using range analysis

BALAKRISHNAN GOGUL

Embedding class hierarchy into object models for multiple class inheritance

GANAI MALAY K

Integrating interval constraint propagation with nonlinear real arithmetic