Inventor

GERMANN PHILIP R

US33 patents

⚠️ This page may combine multiple inventors who share the name “GERMANN PHILIP R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GERMANN PHILIP R

IBM

Capacitance-based microchip exploitation detection

Multi-level memory architecture with data prioritization

Residual material detection in backdrilled stubs

Residual material detection in backdrilled stubs

Residual material detection in backdrilled stubs

Capacitance structures for defeating microchip tampering

Method and structure for dispensing chip underfill through an opening in the chip

Dynamic latency map for memory optimization

False connection for defeating microchip exploitation

Intelligent chip placement within a three-dimensional chip stack

Interconnect solder bumps for die testing

Structure and method of implementing power savings during addressing of DRAM architectures

Techniques for providing switchable decoupling capacitors for an integrated circuit

Intelligent chip placement within a three-dimensional chip stack

Implementing selective rework for chip stacks and silicon carrier assemblies

Design structure of implementing power savings during addressing of DRAM architectures

Using common mode differential data signals of DDR2 SDRAM for control signal transmission

Using common mode differential data signals of DDR2 SDRAM for control signal transmission

System and method for implementing optimized creation of openings for de-gassing in an electronic package

Donor cores to improve integrated circuit yield

Spider web interconnect topology utilizing multiple port connection

BARTLEY GERALD K

Through silicon via direct FET signal gating

Field-effect transistor and method of creating same

Implementing semiconductor signal-capable capacitors with deep trench and TSV technologies

Power domain controller with gated through silicon via having FET with horizontal channel

Continuity check monitoring for microchip exploitation detection

Signal quality monitoring to defeat microchip exploitation

Resistance sensing for defeating microchip exploitation

Doped implant monitoring for microchip tamper detection

Sorting movable memory hierarchies in a computer system

Structure for multi-level memory architecture with data prioritization

Implementing memory interface with configurable bandwidth

GERMANN PHILIP R

Implementing interleaved-dielectric joining of multi-layer laminates