Inventor
NEUMAYER DEBORAH A
US50 patents
⚠️ This page may combine multiple inventors who share the name “NEUMAYER DEBORAH A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
33 patentsUS7491658B2Feb 17, 2009
Ultra low k plasma enhanced chemical vapor deposition processes using a single bifunctional precursor containing both a SiCOH matrix functionality and organic porogen functionality
IBM63 citations98
US6982230B2Jan 3, 2006
Deposition of hafnium oxide and/or zirconium oxide and fabrication of passivated electronic structures
IBM112 citations98
US6888714B2May 3, 2005
Tuneable ferroelectric decoupling capacitor
IBM106 citations97
US7479306B2Jan 20, 2009
SiCOH dielectric material with improved toughness and improved Si-C bonding, semiconductor device containing the same, and method to make the same
IBM26 citations92
US6507476B1Jan 14, 2003
Tuneable ferroelectric decoupling capacitor
IBM17 citations92
US7915180B2Mar 29, 2011
SiCOH film preparation using precursors with built-in porogen functionality
IBM8 citations84
US7892648B2Feb 22, 2011
SiCOH dielectric material with improved toughness and improved Si-C bonding
IBM8 citations84
US7674521B2Mar 9, 2010
Materials containing voids with void size controlled on the nanometer scale
IBM9 citations84
US7521377B2Apr 21, 2009
SiCOH film preparation using precursors with built-in porogen functionality
IBM11 citations84
US9515252B1Dec 6, 2016
Low degradation MRAM encapsulation process using silicon-rich silicon nitride film
IBM13 citations83
US6541331B2Apr 1, 2003
Method of manufacturing high dielectric constant material
IBM12 citations74
US10541151B1Jan 21, 2020
Disposable laser/flash anneal absorber for embedded neuromorphic memory device fabrication
IBM2 citations73
US9984940B1May 29, 2018
Selective and conformal passivation layer for 3D high-mobility channel devices
IBM6 citations73
US9698043B1Jul 4, 2017
Shallow trench isolation for semiconductor devices
IBM5 citations73
US9881793B2Jan 30, 2018
Neutral hard mask and its application to graphoepitaxy-based directed self-assembly (DSA) patterning
IBM2 citations72
US9679775B2Jun 13, 2017
Selective dopant junction for a group III-V semiconductor device
IBM2 citations72
US9418846B1Aug 16, 2016
Selective dopant junction for a group III-V semiconductor device
IBM4 citations72
US6984415B2Jan 10, 2006
Delivery systems for gases for gases via the sublimation of solid precursors
IBM7 citations71
US8373271B2Feb 12, 2013
Interconnect structure with an oxygen-doped SiC antireflective coating and method of fabrication
IBM4 citations63
US11168234B2Nov 9, 2021
Enhanced adhesive materials and processes for 3D applications
IBM0 citations62
US10727114B2Jul 28, 2020
Interconnect structure including airgaps and substractively etched metal lines
IBM1 citations62
US9293557B2Mar 22, 2016
Low temperature spacer for advanced semiconductor devices
IBM2 citations62
US10684246B2Jun 16, 2020
On-chip biosensors with nanometer scale glass-like carbon electrodes and improved adhesive coupling
IBM0 citations52
US10585060B2Mar 10, 2020
On-chip biosensors with nanometer scale glass-like carbon electrodes and improved adhesive coupling
IBM0 citations52
US9691972B1Jun 27, 2017
Low temperature encapsulation for magnetic tunnel junction
IBM1 citations52
US9484403B2Nov 1, 2016
Boron rich nitride cap for total ionizing dose mitigation in SOI devices
IBM0 citations52
US9231063B2Jan 5, 2016
Boron rich nitride cap for total ionizing dose mitigation in SOI devices
IBM0 citations52
US9112068B2Aug 18, 2015
Laser doping of crystalline semiconductors using a dopant-containing amorphous silicon stack for dopant source and passivation
IBM0 citations52
US7566938B2Jul 28, 2009
Deposition of hafnium oxide and/or zirconium oxide and fabrication of passivated electronic structures
IBM0 citations52
US6653246B2Nov 25, 2003
High dielectric constant materials
IBM1 citations52
US11220742B2Jan 11, 2022
Low temperature lift-off patterning for glassy carbon films
IBM0 citations51
US9698339B1Jul 4, 2017
Magnetic tunnel junction encapsulation using hydrogenated amorphous semiconductor material
IBM1 citations51
US9590054B2Mar 7, 2017
Low temperature spacer for advanced semiconductor devices
IBM0 citations51
LIN QINGHUANG
4 patentsUS8202783B2Jun 19, 2012
Patternable low-k dielectric interconnect structure with a graded cap layer and method of fabrication
LIN QINGHUANG9 citations84
US8461039B2Jun 11, 2013
Patternable low-K dielectric interconnect structure with a graded cap layer and method of fabrication
LIN QINGHUANG5 citations73
US9484248B2Nov 1, 2016
Patternable dielectric film structure with improved lithography and method of fabricating same
LIN QINGHUANG2 citations63
US8618663B2Dec 31, 2013
Patternable dielectric film structure with improved lithography and method of fabricating same
LIN QINGHUANG0 citations52
BONILLA GRISELDA
2 patentsGATES STEPHEN M
2 patentsCOTTE JOHN M
2 patentsUS8604337B2Dec 10, 2013
Method to evaluate effectiveness of substrate cleanness and quantity of pin holes in an antireflective coating of a solar cell
COTTE JOHN M2 citations62
US8519260B2Aug 27, 2013
Method to evaluate effectiveness of substrate cleanness and quantity of pin holes in an antireflective coating of a solar cell
COTTE JOHN M2 citations62