Inventor
LIPTAY JOHN S
US17 patents
Patents
17 patentsUS4901233AFeb 13, 1990
Computer system with logic for writing instruction identifying data into array control lists for precise post-branch recoveries
IBM162 citations98
US5504859AApr 2, 1996
Data processor with enhanced error recovery
IBM118 citations96
US5134561AJul 28, 1992
Computer system with logic for writing instruction identifying data into array control lists for precise post-branch recoveries
IBM105 citations96
US5495590AFeb 27, 1996
Checkpoint synchronization with instruction overlap enabled
IBM55 citations95
US4200927AApr 29, 1980
Multi-instruction stream branch processing mechanism
IBM306 citations93
US6865645B1Mar 8, 2005
Program store compare handling between instruction and operand caches
IBM27 citations92
US5257354AOct 26, 1993
System for monitoring and undoing execution of instructions beyond a serialization point upon occurrence of in-correct results
IBM38 citations92
US4189772AFeb 19, 1980
Operand alignment controls for VFL instructions
IBM40 citations92
US4189770AFeb 19, 1980
Cache bypass control for operand fetches
IBM35 citations92
US5495587AFeb 27, 1996
Method for processing checkpoint instructions to allow concurrent execution of overlapping instructions
IBM20 citations91
US4189768AFeb 19, 1980
Operand fetch control improvement
IBM41 citations91
US4287561ASep 1, 1981
Address formulation interlock mechanism
IBM22 citations82
US6671794B1Dec 30, 2003
Address generation interlock detection
IBM11 citations73
US5625808AApr 29, 1997
Read only store as part of cache store for storing frequently used millicode instructions
IBM11 citations69
US6745313B2Jun 1, 2004
Absolute address bits kept in branch history table
IBM4 citations63
US6662296B1Dec 9, 2003
Method and system for testing millicode branch points
IBM4 citations63
US6751708B2Jun 15, 2004
Method for ensuring that a line is present in an instruction cache
IBM1 citations52