Inventor
TRESIDDER MICHAEL J
CA22 patents
⚠️ This page may combine multiple inventors who share the name “TRESIDDER MICHAEL J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ADVANCED MICRO DEVICES INC
15 patentsUS10541841B1Jan 21, 2020
Hardware transmit equalization for high speed
ADVANCED MICRO DEVICES INC10 citations82
US10895901B1Jan 19, 2021
Method and apparatus for data scrambling
ADVANCED MICRO DEVICES INC2 citations70
US10656696B1May 19, 2020
Reducing chiplet wakeup latency
ADVANCED MICRO DEVICES INC3 citations70
US10873445B2Dec 22, 2020
Deskewing method for a physical layer interface on a multi-chip module
ADVANCED MICRO DEVICES INC1 citations69
US10581587B1Mar 3, 2020
Deskewing method for a physical layer interface on a multi-chip module
ADVANCED MICRO DEVICES INC3 citations69
US12373369B2Jul 29, 2025
Scheduling training of an inter-chiplet interface
ADVANCED MICRO DEVICES INC0 citations62
US12147366B2Nov 19, 2024
Droop mitigation for an inter-chiplet interface
ADVANCED MICRO DEVICES INC1 citations62
US11132327B2Sep 28, 2021
Method and apparatus for physical layer bypass
ADVANCED MICRO DEVICES INC0 citations61
US11281280B2Mar 22, 2022
Reducing chiplet wakeup latency
ADVANCED MICRO DEVICES INC0 citations60
US11693465B2Jul 4, 2023
Method and apparatus for data scrambling
ADVANCED MICRO DEVICES INC0 citations59
US11283589B2Mar 22, 2022
Deskewing method for a physical layer interface on a multi-chip module
ADVANCED MICRO DEVICES INC0 citations59
US11960435B2Apr 16, 2024
Skew matching in a die-to-die interface
ADVANCED MICRO DEVICES INC0 citations57
US12524365B2Jan 13, 2026
Programmable provision of lanes of a computing system interconnect
ADVANCED MICRO DEVICES INC0 citations54
US9621143B2Apr 11, 2017
Propagation simulation buffer for clock domain crossing
ADVANCED MICRO DEVICES INC0 citations47
US12052153B2Jul 30, 2024
Dynamic fine grain link control
ADVANCED MICRO DEVICES INC0 citations44
LSI LOGIC CORP
4 patentsUS5594886AJan 14, 1997
Pseudo-LRU cache memory replacement method and apparatus utilizing nodes
LSI LOGIC CORP95 citations95
US6353906B1Mar 5, 2002
Testing synchronization circuitry using digital simulation
LSI LOGIC CORP40 citations92
US6081527AJun 27, 2000
Asynchronous transfer scheme using multiple channels
LSI LOGIC CORP23 citations88
US6078962AJun 20, 2000
Bi-directional asynchronous transfer scheme using a single handshake
LSI LOGIC CORP12 citations69