Inventor

FITZSIMMONS JOHN A

US94 patents

⚠️ This page may combine multiple inventors who share the name “FITZSIMMONS JOHN A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FITZSIMMONS JOHN A

IBM

Metal to metal bonding for stacked (3D) integrated circuits

Interconnect structures containing stress adjustment cap layer

Device and methodology for reducing effective dielectric constant in semiconductor devices

Reliable low-k interconnect structure with hybrid dielectric

Adhesion of silicon carbide films

Method for forming patterned films on a substrate

Device and methodology for reducing effective dielectric constant in semiconductor devices

Structure and method of chemically formed anchored metallic vias

Crackstop with release layer for crack control in semiconductors

Roughened bonding pad and bonding wire surfaces for low pressure wire bonding

Exposed pore sealing post patterning

Interconnect structure improvements

Damascene interconnect structures including etchback for low-k dielectric materials

Method for cleaning and preconditioning a chemical vapor deposition chamber dome

Reliable low-k interconnect structure with hybrid dielectric

Advanced BEOL interconnect structures with low-k PE CVD cap layer and method thereof

Advanced BEOL interconnect structures with low-k PE CVD cap layer and method thereof

Structure and fabrication of SiCr microfuses

Method of forming electronic fuse line with modified cap

Device and methodology for reducing effective dielectric constant in semiconductor devices

Copper alloy via bottom liner

Compressible films surrounding solder connectors

Method of making conductor contacts having enhanced reliability

Process for cleaning semiconductor devices and/or tooling during manufacturing thereof

Integrated circuit fabrication process using gas cluster ion beam etching

Method and apparatus to improve coating quality

SiCr microfuses

Device and methodology for reducing effective dielectric constant in semiconductor devices

Exposed pore sealing post patterning

Method and structure to enhance temperature/humidity/bias performance of semiconductor devices by surface modification

Stabilization of fluorine-containing dielectric materials in a metal insulator wiring structure

Film planarization for low-k polymers used in semiconductor structures

Wafer to wafer alignment

Compressible films surrounding solder connectors

Method and apparatus for controlling coating thickness

GLOBALFOUNDRIES INC

SOI wafers with buried dielectric layers to prevent Cu diffusion

Integrated circuit with replacement gate stacks and method of forming same

SOI wafers with buried dielectric layers to prevent CU diffusion

Device layer transfer with a preserved handle wafer section

INFINEON TECHNOLOGIES AG

Bilayer HDP CVD/PE CVD cap in advance BEOL interconnect structures and method thereof

Bilayer HDP CVD/PE CVD cap in advanced BEOL interconnect structures and method thereof

EDELSTEIN DANIEL C

Reducing effective dielectric constant in semiconductor devices

FILIPPI RONALD G

Electromigration immune through-substrate vias

DEAN ALICIA

Photoresist stripper

AFZALI-ARDAKANI ALI

Aqueous cerium-containing solution having an extended bath lifetime for removing mask material

AKINMADE-YUSUFF HAKEEM B S

Bilayer trench first hardmask structure and process for reduced defectivity

FAROOQ MUKTA G

Bottom-up plating of through-substrate vias

FITZSIMMONS JOHN A

Titanium-nitride removal

AKINMADE YUSUFF HAKEEM

Method for reworking antireflective coating over semiconductor substrate

AKINMADE-YUSUFF HAKEEM

Method and structure for reworking antireflective coating over semiconductor substrate