P

Inventor

DEVAL MANASI

US37 patents
⚠️ This page may combine multiple inventors who share the name “DEVAL MANASI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

33 patents
US7453797B2Nov 18, 2008

Method to provide high availability in network elements using distributed architectures

INTEL CORP22 citations92
US7540028B2May 26, 2009

Dynamic network security apparatus and methods or network processors

INTEL CORP45 citations91
US11556436B2Jan 17, 2023

Memory enclaves using process address space identifiers in a scalable input/output (I/O) virtualization (S-IOV) architecture

INTEL CORP4 citations85
US7388840B2Jun 17, 2008

Methods and apparatuses for route management on a networking control plane

INTEL CORP10 citations83
US10768841B2Sep 8, 2020

Technologies for managing network statistic counters

INTEL CORP2 citations79
US12395474B2Aug 19, 2025

Technologies for accelerated QUIC packet processing with hardware offloads

INTEL CORP1 citations73
US7646759B2Jan 12, 2010

Apparatus and method for configuring data plane behavior on network forwarding elements

INTEL CORP7 citations73
US11474916B2Oct 18, 2022

Failover of virtual devices in a scalable input/output (I/O) virtualization (S-IOV) architecture

INTEL CORP2 citations72
US11451609B2Sep 20, 2022

Technologies for accelerated HTTP processing with hardware acceleration

INTEL CORP1 citations72
US11870759B2Jan 9, 2024

Technologies for accelerated QUIC packet processing with hardware offloads

INTEL CORP1 citations71
US11513924B2Nov 29, 2022

Flexible memory mapped input/output (I/O) space definition for a virtual device in a scalable I/O virtualization (S-IOV) architecture

INTEL CORP2 citations71
US11336625B2May 17, 2022

Technologies for accelerated QUIC packet processing with hardware offloads

INTEL CORP1 citations71
US9262354B2Feb 16, 2016

Adaptive interrupt moderation

INTEL CORP1 citations63
US11875839B2Jan 16, 2024

Flow based rate limit

INTEL CORP0 citations62
US11805081B2Oct 31, 2023

Apparatus and method for buffer management for receive segment coalescing

INTEL CORP1 citations62
US11573870B2Feb 7, 2023

Zero copy host interface in a scalable input/output (I/O) virtualization (S-IOV) architecture

INTEL CORP0 citations62
US11556437B2Jan 17, 2023

Live migration of virtual devices in a scalable input/output (I/O) virtualization (S-IOV) architecture

INTEL CORP0 citations62
US12519741B2Jan 6, 2026

Concept for segmenting an application buffer into data packets

INTEL CORP0 citations61
US12368767B2Jul 22, 2025

Technologies for accelerated HTTP processing with hardware acceleration

INTEL CORP0 citations61
US12218840B2Feb 4, 2025

Flexible scheme for adding rules to a NIC pipeline

INTEL CORP0 citations61
US12117910B2Oct 15, 2024

Virtual device composition in a scalable input/output (I/O) virtualization (S-IOV) architecture

INTEL CORP0 citations61
US12010019B2Jun 11, 2024

Concept for segmenting an application buffer into data packets

INTEL CORP0 citations61
US11757973B2Sep 12, 2023

Technologies for accelerated HTTP processing with hardware acceleration

INTEL CORP0 citations61
US11271856B2Mar 8, 2022

Concept for segmenting an application buffer into data packets

INTEL CORP0 citations61
US11689470B2Jun 27, 2023

Allocation of processors for processing packets

INTEL CORP0 citations60
US12132663B2Oct 29, 2024

Technologies for protocol-agnostic network packet segmentation

INTEL CORP0 citations59
US11522805B2Dec 6, 2022

Technologies for protocol-agnostic network packet segmentation

INTEL CORP0 citations59
US11403137B2Aug 2, 2022

Method and apparatus for secure data center bridging in a multi-tenant system

INTEL CORP0 citations55
US12255974B2Mar 18, 2025

Quick user datagram protocol (UDP) internet connections (QUIC) packet offloading

INTEL CORP1 citations53
US10346326B2Jul 9, 2019

Adaptive interrupt moderation

INTEL CORP0 citations52
US10355959B2Jul 16, 2019

Techniques associated with server transaction latency information

INTEL CORP0 citations45
US9503347B2Nov 22, 2016

Techniques associated with server transaction latency information

INTEL CORP1 citations45
US11201829B2Dec 14, 2021

Technologies for pacing network packet transmissions

INTEL CORP0 citations44

MICROSOFT TECHNOLOGY LICENSING LLC

3 patents

LI YADONG

1 patent