Inventor

HOFSTEE HARM PETER

US84 patents

⚠️ This page may combine multiple inventors who share the name “HOFSTEE HARM PETER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HOFSTEE HARM PETER

IBM

Multi-chip integrated circuit module

System and method for sharing memory by heterogeneous processors

Communications bus with redundant signal paths and method for compensating for signal path errors in a communications bus

SIMD datapath coupled to scalar/vector/address/conditional data register file with selective subpath scalar processing mode

Method and apparatus for controlling power and performance in a multiprocessing system according to customer level operational requirements

Symmetric multi-processing system with attached processing units being able to access a shared memory without being structurally configured with an address translation mechanism

Method and apparatus for computer system reliability

Silicon packaging with through wafer interconnects

Method and system for controlled distribution of application code and content data within a computer network

Method and system for controlled distribution of application code and content data within a computer network

Processor with redundant logic

Multiprocessor with pair-wise high reliability mode, and method therefore

Symmetric multiprocessor coherence mechanism

Processor and method that accelerate evaluation of pairs of condition-setting and branch instructions

At-speed scan testing

Method for performing address mapping using two lookup tables

Multiple level cache memory with overlapped L1 and L2 memory access

System for asynchronous DMA command completion notification wherein the DMA command comprising a tag belongs to a plurality of tag groups

Dynamically partitioning processing across plurality of heterogeneous processors

Computer architecture and software cells for broadband networks

System and method asynchronous DMA command completion notification by accessing register via attached processing unit to determine progress of DMA command

Memory management for real-time applications

Method and apparatus for coherent memory structure of heterogeneous processor systems

Ring-topology based multiprocessor data access bus

Memory management in multiprocessor system

Method and system for maintaining coherency in a multiprocessor system by broadcasting TLB invalidated entry instructions

Processor with improved history file mechanism for restoring processor state after an exception

System and method for sharing memory by heterogeneous processors

System and method for selecting and using a signal processor in a multiprocessor system to operate as a security for encryption/decryption of data

Oscillator array with row and column control

System and method for encrypting and verifying messages using three-phase encryption

Token based DMA

Condition code register architecture for supporting multiple execution units

Lowered PU power usage method and apparatus

Method and apparatus for evaluating results of multiple software tools

System and method in a pipelined processor for generating a single cycle pipeline stall

Memory with combined line and word access

SIMD-RISC microprocessor architecture

Method of functionality testing for a ring oscillator

Software-controlled cache set management with software-generated class identifiers

Processing modules for computer architecture for broadband networks

Efficient function interpolation using SIMD vector permute functionality

System and method for high-speed register renaming by counting

Non-homogeneous multi-processor system with shared memory

Symmetric multi-processing system utilizing a DMAC to allow address translation for attached processors

Method and apparatus for implementing microprocessor control logic using dynamic programmable logic arrays

BROKENSHIRE DANIEL ALAN

Authenticating messages using cryptographic algorithm constants supplied to a storage-constrained target

Dynamically partitioning processing across a plurality of heterogeneous processors

ANDRY PAUL STEPHEN

Silicon carrier structure and method of forming same

DHONG SANG HOO

Method for controlling rounding modes in single instruction multiple data (SIMD) floating-point units