Inventor
SACHDEV MANOJ
CA36 patents
⚠️ This page may combine multiple inventors who share the name “SACHDEV MANOJ”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
PHILIPS CORP
10 patentsUS5495448AFeb 27, 1996
Memory testing through cumulative word line activation
PHILIPS CORP21 citations92
US5491665AFeb 13, 1996
IDDQ -testable RAM
PHILIPS CORP32 citations92
US6445235B1Sep 3, 2002
Iddq-testable uni-directional master-slave
PHILIPS CORP17 citations84
US5831463ANov 3, 1998
MOS master-slave flip-flop with reduced number of pass gates
PHILIPS CORP19 citations84
US6134688AOct 17, 2000
Electronic device selectably operable as a sequential logic circuit or a combinatorial logic circuit and circuit testing method
PHILIPS CORP15 citations74
US6127838AOct 3, 2000
IDDQ testable programmable logic arrays
PHILIPS CORP11 citations74
US5969653AOct 19, 1999
Testing control signals in A/D converters
PHILIPS CORP8 citations74
US5781025AJul 14, 1998
Method for testing an electronic circuit by logically combining clock signals, and an electronic circuit provided with facilities for such testing
PHILIPS CORP8 citations71
US5831986ANov 3, 1998
Fault-tolerant memory address decoder
PHILIPS CORP5 citations63
US5751141AMay 12, 1998
IDDQ -testing of bias generator circuit
PHILIPS CORP3 citations60
INTEL CORP
6 patentsUS6765414B2Jul 20, 2004
Low frequency testing, leakage control, and burn-in control for high-performance digital circuits
INTEL CORP16 citations83
US11483167B2Oct 25, 2022
Method and apparatus to provide memory based physically unclonable functions
INTEL CORP2 citations73
US11082241B2Aug 3, 2021
Physically unclonable function with feed-forward addressing and variable latency output
INTEL CORP3 citations73
US6369631B1Apr 9, 2002
High performance impulse flip-flops
INTEL CORP6 citations72
US6429711B1Aug 6, 2002
Stack-based impulse flip-flop with stack node pre-charge and stack node pre-discharge
INTEL CORP6 citations63
US6366147B2Apr 2, 2002
High performance impulse flip-flops
INTEL CORP3 citations61
SACHDEV MANOJ
6 patentsUS8072797B2Dec 6, 2011
SRAM cell without dedicated access transistors
SACHDEV MANOJ13 citations82
US7613067B2Nov 3, 2009
Soft error robust static random access memory cells
SACHDEV MANOJ8 citations80
US7372721B2May 13, 2008
Segmented column virtual ground scheme in a static random access memory (SRAM) circuit
SACHDEV MANOJ14 citations80
US9542995B2Jan 10, 2017
Threshold voltage mismatch compensation sense-amplifiers for static random access memories with multiple differential inputs
SACHDEV MANOJ3 citations71
US8164943B2Apr 24, 2012
Soft error robust storage SRAM cells and flip-flops
SACHDEV MANOJ4 citations61
US8488403B2Jul 16, 2013
Sense-amplification with offset cancellation for static random access memories
SACHDEV MANOJ2 citations59