Inventor
TSENG UWAY
TW17 patents
⚠️ This page may combine multiple inventors who share the name “TSENG UWAY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MACRONIX INT CO LTD
10 patentsUS6746968B1Jun 8, 2004
Method of reducing charge loss for nonvolatile memory
MACRONIX INT CO LTD32 citations92
US6562682B1May 13, 2003
Method for forming gate
MACRONIX INT CO LTD23 citations92
US6548425B2Apr 15, 2003
Method for fabricating an ONO layer of an NROM
MACRONIX INT CO LTD27 citations92
US6713388B2Mar 30, 2004
Method of fabricating a non-volatile memory device to eliminate charge loss
MACRONIX INT CO LTD11 citations74
US6960506B2Nov 1, 2005
Method of fabricating a memory device having a self-aligned contact
MACRONIX INT CO LTD8 citations73
US7199007B2Apr 3, 2007
Non-volatile memory device having a nitride barrier to reduce the fast erase effect
MACRONIX INT CO LTD4 citations62
US6413840B1Jul 2, 2002
Method of gettering layer for improving chemical-mechanical polishing process in flash memory production and semiconductor structure thereof
MACRONIX INT CO LTD3 citations62
US6734098B2May 11, 2004
Method for fabricating cobalt salicide contact
MACRONIX INT CO LTD4 citations61
US7400011B2Jul 15, 2008
Non-volatile memory device having a nitride barrier to reduce the fast erase effect
MACRONIX INT CO LTD0 citations51
US6511907B1Jan 28, 2003
Method for forming a low loss dielectric layer in the tungsten chemical mechanic grinding process
MACRONIX INT CO LTD1 citations51
TAIWAN SEMICONDUCTOR MFG
4 patentsUS8344471B2Jan 1, 2013
CMOS image sensor big via bonding pad application for AICu process
TAIWAN SEMICONDUCTOR MFG11 citations84
US7884013B2Feb 8, 2011
Dual damascene with via liner
TAIWAN SEMICONDUCTOR MFG10 citations81
US7387961B2Jun 17, 2008
Dual damascene with via liner
TAIWAN SEMICONDUCTOR MFG11 citations81
US8680635B2Mar 25, 2014
CMOS image sensor big via bonding pad application for AICu process
TAIWAN SEMICONDUCTOR MFG3 citations63