Inventor
CHANG NAI-CHIH
US14 patents
⚠️ This page may combine multiple inventors who share the name “CHANG NAI-CHIH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
10 patentsUS7415549B2Aug 19, 2008
DMA completion processing mechanism
INTEL CORP44 citations89
US7450588B2Nov 11, 2008
Storage network out of order packet reordering mechanism
INTEL CORP13 citations83
US7451255B2Nov 11, 2008
Hardware port scheduler (PTS) having register to indicate which of plurality of protocol engines PTS is to support
INTEL CORP14 citations82
US7221531B2May 22, 2007
Staggered spin-up disable mechanism
INTEL CORP12 citations82
US7664889B2Feb 16, 2010
DMA descriptor management mechanism
INTEL CORP11 citations81
US7418615B2Aug 26, 2008
Universal timeout mechanism
INTEL CORP8 citations71
US7366817B2Apr 29, 2008
Frame order processing apparatus, systems, and methods
INTEL CORP2 citations62
US7984208B2Jul 19, 2011
Method using port task scheduler
INTEL CORP2 citations60
US7620751B2Nov 17, 2009
Command scheduling and affiliation management for serial attached storage devices
INTEL CORP1 citations51
US7516257B2Apr 7, 2009
Mechanism to handle uncorrectable write data errors
INTEL CORP0 citations41