Inventor

WRIGHT JEFFREY P

US133 patents

Patents

50 patents

US6665222B2Dec 16, 2003

Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals

MICRON TECHNOLOGY INC62 citations96

US5966388AOct 12, 1999

High-speed test system for a memory device

MICRON TECHNOLOGY INC80 citations96

US5903509AMay 11, 1999

Memory device with multiple internal banks and staggered command execution

MICRON TECHNOLOGY INC80 citations96

US5895962AApr 20, 1999

Structure and a method for storing information in a semiconductor device

MICRON TECHNOLOGY INC69 citations96

US5883853AMar 16, 1999

Clock frequency detector for a synchronous memory device

MICRON TECHNOLOGY INC47 citations96

US5748551AMay 5, 1998

Memory device with multiple internal banks and staggered command execution

MICRON TECHNOLOGY INC58 citations96

US5673233ASep 30, 1997

Synchronous memory allowing early read command in write to read transitions

MICRON TECHNOLOGY INC72 citations96

US5587961ADec 24, 1996

Synchronous memory allowing early read command in write to read transitions

MICRON TECHNOLOGY INC52 citations96

US6269035B1Jul 31, 2001

Circuit and method for a multiplexed redundancy scheme in a memory device

MICRON TECHNOLOGY INC46 citations95

US6144593ANov 7, 2000

Circuit and method for a multiplexed redundancy scheme in a memory device

MICRON TECHNOLOGY INC54 citations95

US10811066B2Oct 20, 2020

Apparatuses and methods for targeted refreshing of memory

MICRON TECHNOLOGY INC28 citations94

US7514954B2Apr 7, 2009

Method and apparatus for output driver calibration

MICRON TECHNOLOGY INC46 citations93

US7495487B2Feb 24, 2009

Delay-locked loop (DLL) system for determining forward clock path delay

MICRON TECHNOLOGY INC15 citations93

US7009911B2Mar 7, 2006

Memory array decoder

MICRON TECHNOLOGY INC18 citations93

US6754118B2Jun 22, 2004

Method for writing to multiple banks of a memory device

MICRON TECHNOLOGY INC16 citations93

US6529429B2Mar 4, 2003

Method for writing to multiple banks of a memory device

MICRON TECHNOLOGY INC23 citations93

US6512711B1Jan 28, 2003

Synchronous dynamic random access memory device

MICRON TECHNOLOGY INC22 citations93

US6351404B1Feb 26, 2002

Synchronous dynamic random access memory device

MICRON TECHNOLOGY INC26 citations93

US6310819B1Oct 30, 2001

Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals

MICRON TECHNOLOGY INC25 citations93

US6229749B1May 8, 2001

Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals

MICRON TECHNOLOGY INC23 citations93

US6215709B1Apr 10, 2001

Synchronous dynamic random access memory device

MICRON TECHNOLOGY INC23 citations93

US6141290AOct 31, 2000

Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals

MICRON TECHNOLOGY INC24 citations93

US6044027AMar 28, 2000

Circuit and method for providing a substantially constant time delay over a range of supply voltages

MICRON TECHNOLOGY INC36 citations93

US5982599ANov 9, 1999

Input/output electrostatic discharge protection for devices with multiple individual power groups

MICRON TECHNOLOGY INC17 citations93

US5936901AAug 10, 1999

Shared data lines for memory write and memory test operations

MICRON TECHNOLOGY INC22 citations93

US5805505ASep 8, 1998

Circuit and method for converting a pair of input signals into a level-limited output signal

MICRON TECHNOLOGY INC38 citations93

US5796266AAug 18, 1998

Circuit and a method for configuring pad connections in an integrated device

MICRON TECHNOLOGY INC20 citations93

US5748542AMay 5, 1998

Circuit and method for providing a substantially constant time delay over a range of supply voltages

MICRON TECHNOLOGY INC24 citations93

US5721658AFeb 24, 1998

Input/output electrostatic discharge protection for devices with multiple individual power groups

MICRON TECHNOLOGY INC19 citations93

US5612630AMar 18, 1997

Asynchronous self-adjusting input circuit

MICRON TECHNOLOGY INC21 citations93

US7757061B2Jul 13, 2010

System and method for decoding commands based on command signals and operating state

MICRON TECHNOLOGY INC14 citations92

US7441949B2Oct 28, 2008

System and method for providing temperature data from a memory device having a temperature sensor

MICRON TECHNOLOGY INC24 citations92

US6055611AApr 25, 2000

Method and apparatus for enabling redundant memory

MICRON TECHNOLOGY INC36 citations92

Showing the top 50 of 133 patents by PatentIndex Score.

WRIGHT JEFFREY P

Patents

Synchronous dynamic random access memory device

Synchronous dynamic random access memory device

Method for writing to multiple banks of a memory device

Multiple bank memory with auto refresh to specified bank

Apparatuses and methods for targeted refreshing of memory

Apparatuses and methods for targeted refreshing of memory

Apparatuses and methods for targeted refreshing of memory

Apparatuses and methods for targeted refreshing of memory

Method and apparatus for storage of test results within an integrated circuit

Method and apparatus for storage of test results within an integrated circuit

High speed test system for a memory device

Synchronous dynamic random access memory device

Method for writing to multiple banks of a memory device

Method for storing information in a semiconductor device

High-speed test system for a memory device

Testing parameters of an electronic device

Method for writing to multiple banks of a memory device

Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals

High-speed test system for a memory device

Memory device with multiple internal banks and staggered command execution

Structure and a method for storing information in a semiconductor device

Clock frequency detector for a synchronous memory device

Memory device with multiple internal banks and staggered command execution

Synchronous memory allowing early read command in write to read transitions

Synchronous memory allowing early read command in write to read transitions

Circuit and method for a multiplexed redundancy scheme in a memory device

Circuit and method for a multiplexed redundancy scheme in a memory device

Apparatuses and methods for targeted refreshing of memory

Method and apparatus for output driver calibration

Delay-locked loop (DLL) system for determining forward clock path delay

Memory array decoder

Method for writing to multiple banks of a memory device

Method for writing to multiple banks of a memory device

Synchronous dynamic random access memory device

Synchronous dynamic random access memory device

Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals

Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals

Synchronous dynamic random access memory device

Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals

Circuit and method for providing a substantially constant time delay over a range of supply voltages

Input/output electrostatic discharge protection for devices with multiple individual power groups

Shared data lines for memory write and memory test operations

Circuit and method for converting a pair of input signals into a level-limited output signal

Circuit and a method for configuring pad connections in an integrated device

Circuit and method for providing a substantially constant time delay over a range of supply voltages

Input/output electrostatic discharge protection for devices with multiple individual power groups

Asynchronous self-adjusting input circuit

System and method for decoding commands based on command signals and operating state

System and method for providing temperature data from a memory device having a temperature sensor

Method and apparatus for enabling redundant memory