Inventor

HOFMANN FRANZ

DE128 patents

⚠️ This page may combine multiple inventors who share the name “HOFMANN FRANZ”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HOFMANN FRANZ

INFINEON TECHNOLOGIES AG

Electronic device and method for fabricating an electronic device

High-density NROM-FINFET

Non-volatile memory cell and fabrication method

Electrically programmable memory cell array, using charge carrier traps and insulation trenches

Memory cell configuration, method for fabricating it and methods for operating it

Method for manufacturing a multi-bit memory cell

Method of producing a memory cell configuration

Charge-trapping memory cell and method for production

Integrated circuit configuration and method for manufacturing it

Method for producing a cell of a semiconductor memory

DRAM cell circuit

DRAM cell arrangement and method for fabricating it

Method for fabricating a memory cell having a MOS transistor

DRAM cell configuration and method for its production

Fin field effect transistor arrangement and method for producing a fin field effect transistor arrangement

DRAM memory cell

Semiconductor memory with vertical memory transistors in a cell array arrangement with 1-2F2 cells

Memory cell configuration and method for its production

Production method for a FinFET transistor arrangement, and corresponding FinFET transistor arrangement

Non-volatile memory cells and methods for fabricating non-volatile memory cells

Integrated circuit with vertical transistors

Nonvolatile memory cell arrangement

NROM semiconductor memory device and fabrication method

DRAM cell structure with tunnel barrier

Transistor-arrangement, method for operating a transistor arrangement as a data storage element and method for producing a transistor-arrangement

Bar-type field effect transistor and method for the production thereof

SIEMENS AG

Memory cell arrangement with vertical MOS transistors and the production process thereof

CMOS integrated circuit including forming doped wells, a layer of intrinsic silicon, a stressed silicon germanium layer where germanium is between 25 and 50%, and another intrinsic silicon layer

Memory cell configuration and method for its fabrication

Electrically programmable memory cell arrangement and method for its manufacture

Method of producing and arrangement containing self-amplifying dynamic MOS transistor memory cells

Method of producing a read-only storage cell arrangement

Read-only-memory cell arrangement using vertical MOS transistors and gate dielectrics of different thicknesses and method for its production

Method for manufacturing an integrated circuit having at least one MOS transistor

Electrically programmable memory cell configuration

Memory cell configuration and production process therefor

Method of operating a storage cell arrangement

Read-only memory cell arrangement and method for its production

High density read only memory cell configuration and method for its production

DRAM cell arrangement and method for its manufacture

Method of forming DRAM cell arrangement

Method for manufacturing vertical MOS transistors

QIMONDA AG

Integrated circuit having a cell with a resistivity changing layer

Integrated circuits having a contact region and methods for manufacturing the same

Integrated circuits and methods of manufacturing thereof

Integrated circuit including a vertical transistor and method

Integrated circuit having NAND memory cell strings

PORSCHE AG

Top for vehicles, particularly passenger cars

INFINEON TECHNOLOGIES INC

Non-volatile memory cell, memory cell arrangement and method for production of a non-volatile memory cell

FISCHER AG GEORG

Ceramic filter and method for using same