Inventor

GUHA SUPRATIK

US123 patents

⚠️ This page may combine multiple inventors who share the name “GUHA SUPRATIK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GUHA SUPRATIK

IBM

Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics

Engineered high dielectric constant oxide and oxynitride heterostructure gate dielectrics by an atomic beam deposition technique

Hybrid organic-inorganic semiconductor light emitting diodes

Removal of charged defects from metal oxide-gate stacks

Product and process for forming a semiconductor structure on a host substrate

Organic light emitting diodes having transparent cathode structures

Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics

Method for forming dielectric stack without interfacial layer

Metal embedded passivation layer structure for microelectronic interconnect formation, customization and repair

Hybrid organic-inorganic semiconductor light emitting diodes

Method of forming lattice-matched structure on silicon and structure formed thereby

Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics

Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics

Stabilization of flatband voltages and threshold voltages in hafnium oxide based silicon transistors for CMOS

Nitrogen-containing field effect transistor gate stack containing a threshold voltage control layer formed via deposition of a metal oxide

Heterogeneous thermal interface for cooling

High density magnetic recording medium utilizing selective growth of ferromagnetic material

Techniques for use of nanotechnology in photovoltaics

Introduction of metal impurity to change workfunction of conductive electrodes

Semiconductor structure including mixed rare earth oxide formed on silicon

Method and apparatus for fabricating or altering microstructures using local chemical alterations

Complementary metal oxide semiconductor (CMOS) gate stack with high dielectric constant gate dielectric and integrated diffusion barrier

Aluminum nitride and aluminum oxide/aluminum nitride heterostructure gate dielectric stack based field effect transistors and method for forming same

Monolithic silicon-based nitride display device

Column III metal nitride films as phase change media for optical recording

Protective insulating layer and chemical mechanical polishing for polycrystalline thin film solar cells

Techniques for analyzing performance of solar panels and solar cells using infrared diagnostics

Holey electrode grids for photovoltaic cells with subwavelength and superwavelength feature sizes

Core-shell nanowire transistor

Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high K dielectrics

Field effect transistor including damascene gate with an internal spacer structure

Introduction of metal impurity to change workfunction of conductive electrodes

Rare earth metal oxide memory element based on charge storage and method for manufacturing same

Semiconductor structure including mixed rare earth oxide formed on silicon

Dielectric stack without interfacial layer

Hybrid solar thermal and photovoltaic energy collection

Stabilization of metallic nanowire meshes via encapsulation

Techniques for perovskite layer crystallization

Transparent conducting oxide as top-electrode in perovskite solar cell by non-sputtering process

GUHA SUPRATIK

Meteorological parameter forecasting

Holey electrode grids for photovoltaic cells with subwavelength and superwavelength feature sizes

Grid-line-free contact for a photovoltaic cell

Method of concetrating solar energy

AFZALI-ARDAKANI ALI

Method of placing a semiconducting nanostructure and semiconductor device including the semiconducting nanostructure

Method of placing a semiconducting nanostructure and semiconductor device including the semiconducting nanostructure

GRAHAM WILLIAM

Nano/microwire solar cell fabricated by nano/microsphere lithography

Nano/microwire solar cell fabricated by nano/microsphere lithography

BOJARCZUK JR NESTOR A

Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics

APPLE INC

Thermal interface apparatus

MINNESOTA MINING & MFG

III-V/II-VI Semiconductor interface fabrication method