Inventor

LLOYD STACEY G

US7 patents

⚠️ This page may combine multiple inventors who share the name “LLOYD STACEY G”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

3 patents

US7124410B2Oct 17, 2006

Distributed allocation of system hardware resources for multiprocessor systems

IBM95 citations96

US7093257B2Aug 15, 2006

Allocation of potentially needed resources prior to complete transaction receipt

IBM8 citations72

US7237100B2Jun 26, 2007

Transaction redirection mechanism for handling late specification changes and design errors

IBM1 citations50

INTEL CORP

2 patents

US4912631AMar 27, 1990

Burst mode cache with wrap-around fill

INTEL CORP27 citations90

US4808855AFeb 28, 1989

Distributed precharge wire-or bus

INTEL CORP18 citations71

INTERNAT BUSINESS MACHINES COM

1 patent

US6785779B2Aug 31, 2004

Multi-level classification method for transaction address conflicts for ensuring efficient ordering in a two-level snoopy cache architecture

INTERNAT BUSINESS MACHINES COM27 citations91

SIEMENS AG

1 patent

US4860322AAug 22, 1989

Anti-clock skew distribution apparatus

SIEMENS AG30 citations90