Inventor

TOKSVIG MICHAEL J M

US43 patents

⚠️ This page may combine multiple inventors who share the name “TOKSVIG MICHAEL J M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TOKSVIG MICHAEL J M

NVIDIA CORP

Inside testing for paths

Antialiasing using hybrid supersampling-multisampling

Method and apparatus for providing explicit weights for texture filtering

Shader that conditionally updates a framebuffer in a computer graphics system

Selecting real sample locations for ownership of virtual sample locations in a computer graphics system

Inside testing for paths using a derivative mask

Antialiasing using hybrid supersampling-multisampling

Graphical processing system, graphical pipeline and method for implementing subpixel shifting to anti-alias texture

System and method for modifying a number of texture samples for anisotropic texture filtering

System, apparatus and method for subpixel shifting of sample positions to anti-alias computer-generated images

System and method for virtual coverage anti-aliasing

Reconfigurable high performance texture pipeline with advanced filtering

Scalable shader architecture

Decompression of block encoded texture data

Method and system for reducing memory bandwidth requirements in an anti-aliasing operation

Bounding region accumulation for graphics rendering

Decompressing image-based data compressed using luminance

Anisotropic texture sampling for odd ratios

Method and system for implementing level of detail filtering in a cube mapping application

Anisotropic texture filtering optimization

Anisotropic texture filtering with a modified number of texture samples

Using coverage information in computer graphics

Interconnected arithmetic logic units

Pixel center position displacement

Detecting unused cache lines

Using font filtering engines for texture blitting

Pixel center position displacement

System and method for virtual coverage anti-aliasing

Reconfigurable high-performance texture pipeline with advanced filtering

Scalable shader architecture

BERGLAND TYSON J

Interconnected arithmetic logic units

Techniques for sourcing immediate values from a VLIW

Buffering deserialized pixel data in a graphics processor unit pipeline

Shared readable and writeable global values in a graphics processor unit pipeline

TOKSVIG MICHAEL J M

System and method for modifying a number of texture samples for anisotropic texture filtering

Decompression of block encoded texture data

Contiguously packed data

Reducing instruction execution passes of data groups through a data operation unit

HUTCHINS EDWARD A

Writing coverage information to a framebuffer in a computer graphics system

Interpolation of vertex attributes in a graphics processor

MAHAN JUSTIN MICHAEL

Address independent shader program loading

KING GARY C

Compressing image-based data using luminance

MAHAN JUSTIN M

Scoreboard cache coherence in a graphics pipeline