Inventor
EISEN LEE E
US20 patents
⚠️ This page may combine multiple inventors who share the name “EISEN LEE E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
19 patentsUS5805475ASep 8, 1998
Load-store unit and method of loading and storing single-precision floating-point registers in a double-precision architecture
IBM75 citations95
US5619408AApr 8, 1997
Method and system for recoding noneffective instructions within a data processing system
IBM24 citations92
US9141421B2Sep 22, 2015
Reducing power grid noise in a processor while minimizing performance loss
IBM8 citations83
US7769984B2Aug 3, 2010
Dual-issuance of microprocessor instructions using dual dependency matrices
IBM9 citations83
US7392366B2Jun 24, 2008
Adaptive fetch gating in multithreaded processors, fetch control and method of controlling fetches
IBM9 citations82
US5678016AOct 14, 1997
Processor and method for managing execution of an instruction which determine subsequent to dispatch if an instruction is subject to serialization
IBM16 citations74
US5897654AApr 27, 1999
Method and system for efficiently fetching from cache during a cache fill operation
IBM16 citations73
US5809323ASep 15, 1998
Method and apparatus for executing fixed-point instructions within idle execution units of a superscalar processor
IBM9 citations73
US5717587AFeb 10, 1998
Method and system for recording noneffective instructions within a data processing system
IBM7 citations72
US11379228B2Jul 5, 2022
Microprocessor including an efficiency logic unit
IBM0 citations62
US7549095B1Jun 16, 2009
Error detection enhancement in a microprocessor through the use of a second dependency matrix
IBM4 citations62
US10108426B2Oct 23, 2018
Dynamic issue masks for processor hang prevention
IBM0 citations52
US10102002B2Oct 16, 2018
Dynamic issue masks for processor hang prevention
IBM1 citations52
US10514911B2Dec 24, 2019
Structure for microprocessor including arithmetic logic units and an efficiency logic unit
IBM0 citations51
US10503503B2Dec 10, 2019
Generating design structure for microprocessor with arithmetic logic units and an efficiency logic unit
IBM0 citations51
US9146772B2Sep 29, 2015
Reducing power grid noise in a processor while minimizing performance loss
IBM0 citations51
US9996354B2Jun 12, 2018
Instruction stream tracing of multi-threaded processors
IBM0 citations50
US9594561B2Mar 14, 2017
Instruction stream tracing of multi-threaded processors
IBM0 citations50
US9880847B2Jan 30, 2018
Register file mapping
IBM0 citations41