Inventor
VARIOT PATRICK
US32 patents
⚠️ This page may combine multiple inventors who share the name “VARIOT PATRICK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
LSI LOGIC CORP
22 patentsUS5557150ASep 17, 1996
Overmolded semiconductor package
LSI LOGIC CORP106 citations98
US5435482AJul 25, 1995
Integrated circuit having a coplanar solder ball contact array
LSI LOGIC CORP145 citations98
US5989937ANov 23, 1999
Method for compensating for bottom warpage of a BGA integrated circuit
LSI LOGIC CORP42 citations96
US5745986AMay 5, 1998
Method of planarizing an array of plastically deformable contacts on an integrated circuit package to compensate for surface warpage
LSI LOGIC CORP65 citations96
US5692296ADec 2, 1997
Method for encapsulating an integrated circuit package
LSI LOGIC CORP78 citations96
US5570272AOct 29, 1996
Apparatus for encapsulating an integrated circuit package
LSI LOGIC CORP64 citations96
US5563446AOct 8, 1996
Surface mount peripheral leaded and ball grid array package
LSI LOGIC CORP39 citations96
US5527743AJun 18, 1996
Method for encapsulating an integrated circuit package
LSI LOGIC CORP60 citations96
US5933710AAug 3, 1999
Method of providing electrical connection between an integrated circuit die and a printed circuit board
LSI LOGIC CORP26 citations93
US6088914AJul 18, 2000
Method for planarizing an array of solder balls
LSI LOGIC CORP30 citations92
US6054767AApr 25, 2000
Programmable substrate for array-type packages
LSI LOGIC CORP26 citations92
US5869889AFeb 9, 1999
Thin power tape ball grid array package
LSI LOGIC CORP43 citations92
US5841198ANov 24, 1998
Ball grid array package employing solid core solder balls
LSI LOGIC CORP32 citations92
US5420752AMay 30, 1995
GPT system for encapsulating an integrated circuit package
LSI LOGIC CORP28 citations92
US6297550B1Oct 2, 2001
Bondable anodized aluminum heatspreader for semiconductor packages
LSI LOGIC CORP16 citations84
US5789811AAug 4, 1998
Surface mount peripheral leaded and ball grid array package
LSI LOGIC CORP15 citations82
US5981311ANov 9, 1999
Process for using a removeable plating bus layer for high density substrates
LSI LOGIC CORP8 citations74
US5386144AJan 31, 1995
Snap on heat sink attachment
LSI LOGIC CORP14 citations70
US6492253B1Dec 10, 2002
Method for programming a substrate for array-type packages
LSI LOGIC CORP2 citations63
US6489571B1Dec 3, 2002
Molded tape ball grid array package
LSI LOGIC CORP3 citations63
US6143586ANov 7, 2000
Electrostatic protected substrate
LSI LOGIC CORP5 citations63
US6110815AAug 29, 2000
Electroplating fixture for high density substrates
LSI LOGIC CORP6 citations63
INVENSAS LLC
3 patentsUS11929337B2Mar 12, 2024
3D-interconnect
INVENSAS LLC3 citations75
US12040284B2Jul 16, 2024
3D-interconnect with electromagnetic interference (“EMI”) shield and/or antenna
INVENSAS LLC2 citations73
US12021041B2Jun 25, 2024
Region shielding within a package of a microelectronic device
INVENSAS LLC0 citations62