Inventor

CABRAL JR CYRIL

US184 patents

⚠️ This page may combine multiple inventors who share the name “CABRAL JR CYRIL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CABRAL JR CYRIL

IBM

Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics

Method for forming metal replacement gate of high performance

Thin film multi-layer oxygen diffusion barrier consisting of refractory metal, refractory metal aluminide, and aluminum oxide

Deposition of hafnium oxide and/or zirconium oxide and fabrication of passivated electronic structures

Tasin oxygen diffusion barrier in multilayer structures

Metal gate MOSFET by full semiconductor metal alloy conversion

Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics

Field effect transistor with electroplated metal gate

Self-aligned silicide process for silicon sidewall source and drain contacts

Self-aligned silicide process utilizing ion implants for reduced silicon consumption and control of the silicide formation temperature and structure formed thereby

Method for plating copper conductors and devices formed

Tasin oxygen diffusion barrier in multilayer structures

Thin film multi-layer oxygen diffusion barrier consisting of aluminum on refractory metal

Method of forming a film for a multilayer Semiconductor device for improving thermal stability of cobalt silicide using platinum or nitrogen

Tasin oxygen diffusion barrier in multilayer structures

Process options of forming silicided metal gates for advanced CMOS devices

Method and process to make multiple-threshold metal gates CMOS technology

Self-aligned silicide (salicide) process for strained silicon MOSFET ON SiGe and structure formed thereby

Method and structure for controlling the interface roughness of cobalt disilicide

Thin metal barrier for electrical interconnections

Self-forming embedded diffusion barriers

Method for forming electromigration-resistant structures by doping

Method for self-aligned formation of silicide contacts using metal silicon alloys for limited silicon consumption and for reduction of bridging

Low temperature formation of low resistivity titanium silicide

Thin film for a multilayer semiconductor device for improving thermal stability and a method thereof

Activating reactions in integrated circuits through electrical discharge

Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics

Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics

Method and structure for reduction of soft error rates in integrated circuits

Nitrogen-containing field effect transistor gate stack containing a threshold voltage control layer formed via deposition of a metal oxide

High performance FET with laterally thin extension

Temperature stable metal nitride gate electrode

Metal spacer gate for CMOS FET

Semiconductor structure having in-situ formed unit resistors

Method for changing an electrical resistance of a resistor

Method for increasing the capacitance of a trench capacitor

Thin film metal barrier for electrical interconnections

Microstructure modification in copper interconnect structure

Self-aligned metal to form contacts to Ge containing substrates and structure formed thereby

Structure and method of forming electrodeposited contacts

Reduction of silicide formation temperature on SiGe containing substrates

Process options of forming silicided metal gates for advanced CMOS devices

Formation of fully silicided metal gate using dual self-aligned silicide process

Structure and method to generate local mechanical gate stress for MOSFET channel mobility modification

Method for forming self-aligned dual fully silicided gates in CMOS devices

Interconnect structure diffusion barrier with high nitrogen content

Elevated source drain disposable spacer CMOS

Method for forming self-aligned dual salicide in CMOS technologies

LIN QINGHUANG

Method for forming self-aligned airgap interconnect structures

CABRAL JR CYRIL

Contact metallurgy structure