P

Inventor

XUE NING

US44 patents
⚠️ This page may combine multiple inventors who share the name “XUE NING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ALTERA CORP

16 patents
US7064685B1Jun 20, 2006

Data converter with reduced component count for padded-protocol interface

ALTERA CORP20 citations93
US7454537B1Nov 18, 2008

Synchronization and channel deskewing circuitry for multi-channel serial links

ALTERA CORP44 citations92
US7869343B1Jan 11, 2011

Field programmable gate array architectures and methods for supporting forward error correction

ALTERA CORP9 citations84
US7627806B1Dec 1, 2009

Integrated hard-wired or partly hard-wired CRC generation and/or checking architecture for a physical coding sublayer in a programmable logic device

ALTERA CORP14 citations84
US7386767B1Jun 10, 2008

Programmable bit error rate monitor for serial interface

ALTERA CORP16 citations84
US7259699B1Aug 21, 2007

Circuitry for providing configurable running disparity enforcement in 8B/10B encoding and error detection

ALTERA CORP11 citations84
US7162553B1Jan 9, 2007

Correlating high-speed serial interface data and FIFO status signals in programmable logic devices

ALTERA CORP16 citations84
US7151470B1Dec 19, 2006

Data converter with multiple conversions for padded-protocol interface

ALTERA CORP8 citations74
US8363770B1Jan 29, 2013

Oversampling with programmable pointer adjustment

ALTERA CORP4 citations63
US7656187B2Feb 2, 2010

Multi-channel communication circuitry for programmable logic device integrated circuits and the like

ALTERA CORP6 citations63
US7642812B1Jan 5, 2010

Distribution and synchronization of a divided clock signal

ALTERA CORP4 citations63
US7898296B1Mar 1, 2011

Distribution and synchronization of a divided clock signal

ALTERA CORP0 citations52
US7598767B1Oct 6, 2009

Multi-standard data communication interface circuitry for programmable logic devices

ALTERA CORP1 citations52
US7240133B1Jul 3, 2007

Reduced-area architecture for padded-protocol interface

ALTERA CORP1 citations52
US7199732B1Apr 3, 2007

Data converter with reduced component count for padded-protocol interface

ALTERA CORP1 citations52
US9270500B1Feb 23, 2016

Apparatus and methods of dynamic transmit equalization

ALTERA CORP0 citations51

LSI LOGIC CORP

7 patents

ORIGIN POINT BRANDS LLC

7 patents

SHELTERLOGIC CORP

3 patents

MORPH FUNC GUANGZHOU DAILY NECESSITIES COMPANY LTD

2 patents

LANGENWALTER DUANE E

1 patent

WANG TSE-WEI

1 patent

MENDEL DAVID W

1 patent

WORTMAN CURT

1 patent

KRISHNAMURTHY GOPI

1 patent

VIJAYARAGHAVAN DIVYA

1 patent

INTEL CORP

1 patent

UNIV TENNESSEE RES FOUNDATION

1 patent

PROCTER & GAMBLE

1 patent