Inventor

GLASCO DAVID B

US67 patents

⚠️ This page may combine multiple inventors who share the name “GLASCO DAVID B”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GLASCO DAVID B

NEWISYS INC

Synchronized communication between multi-processor clusters of multi-cluster computer systems

Methods and apparatus for providing cache state information

Methods and apparatus for speculative probing at a request cluster

Methods and apparatus for speculative probing with early completion and early request

Methods and apparatus for speculative probing of a remote cluster

Methods and apparatus for managing probe requests

Methods and apparatus for speculative probing of a remote cluster

Communication between and within multi-processor clusters of multi-cluster computer systems

Reliable communication between multi-processor clusters of multi-cluster computer systems

Communication between multi-processor clusters of multi-cluster computer systems

Managing I/O accesses in multiprocessor systems

Cache coherence directory eviction mechanisms in multiprocessor systems which maintain transaction ordering

Methods and apparatus for sending targeted probes

Methods and apparatus for speculative probing with early completion and delayed request

Managing sparse directory evictions in multiprocessor systems via memory locking

Methods and apparatus for multiple cluster locking

Cache coherence directory eviction mechanisms for unmodified copies of memory lines in multiprocessor systems

Dynamic multiple cluster system reconfiguration

Methods and apparatus for responding to a request cluster

Methods and apparatus for providing early responses from a remote data cache

Methods and apparatus for managing probe requests

GLASCO DAVID B

Multi-class data cache policies

Memory access techniques utilizing a set-associative translation lookaside buffer

System and method for cleaning dirty data in an intermediate cache using a data class dependent eviction policy

Memory access techniques including coalesing page table entries

Method and system for converting data formats using a shared cache coupled between clients and an external memory

Cache-based control of atomic operations in conjunction with an external ALU block

Cache-based control of atomic operations in conjunction with an external ALU block

Compression status caching

Memory access management block bind system and method

Memory access techniques providing for override of a page table

System and method for independent invalidation on a per engine basis

Compression status bit cache with deterministic isochronous latency

Storing dynamically sized buffers within a cache

Override system and method for memory access management

System and method for concurrently managing memory access requests

System, method and frame buffer logic for evicting dirty data from a cache using counters and data types

Techniques for evicting dirty data from a cache using a notification sorter and count thresholds

Padding buffer requests to avoid reads of invalid data

NVIDIA CORP

Apparatus, system, and method for using page table entries in a graphics system to provide storage format information for address translation

Direct memory access techniques that include caching segmentation data

Memory access techniques in an aperture mapped memory space

Apparatus, system, and method for using page table entries in a graphics system to provide storage format information for address translation

Caching of page access parameters

Render to texture cull

ROBERTS JAMES

Using a data cache array as a DRAM load/store buffer

Configurable cache occupancy policy

DANSKIN JOHN M

Interprocessor direct cache writes

EDMONDSON JOHN H

Cache and associated method with frame buffer managed dirty data pull and high-priority clean mechanism

DEMING JAMES L

Method and system for tracking accesses to virtual addresses in graphics contexts