Inventor

HOLMQVIST PETER B

US25 patents

⚠️ This page may combine multiple inventors who share the name “HOLMQVIST PETER B”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HOLMQVIST PETER B

GLASCO DAVID B

Multi-class data cache policies

System and method for cleaning dirty data in an intermediate cache using a data class dependent eviction policy

Method and system for converting data formats using a shared cache coupled between clients and an external memory

Cache-based control of atomic operations in conjunction with an external ALU block

Cache-based control of atomic operations in conjunction with an external ALU block

Compression status caching

Compression status bit cache with deterministic isochronous latency

Storing dynamically sized buffers within a cache

System, method and frame buffer logic for evicting dirty data from a cache using counters and data types

Techniques for evicting dirty data from a cache using a notification sorter and count thresholds

Padding buffer requests to avoid reads of invalid data

Efficient line and page organization for compression status bit caching

L2 ECC implementation

L2 ECC implementation

Compression status bit cache and backing store

NVIDIA CORP

Method and apparatus to ensure consistency of depth values computed in different sections of a graphics processor

Method and system for reducing memory bandwidth requirements in an anti-aliasing operation

Control mechanism for fine-tuned cache to backing-store synchronization

Reducing memory traffic in DRAM ECC mode

Compression status bit cache and backing store

ROBERTS JAMES

Using a data cache array as a DRAM load/store buffer

Configurable cache occupancy policy

EDMONDSON JOHN H

Cache and associated method with frame buffer managed dirty data pull and high-priority clean mechanism

HOLMQVIST PETER B

Processing pipeline with latency bypass

MCALLISTER DAVID KIRK

Index-based zero-bandwidth clears