Inventor

HSHIEH FWU-IUAN

US142 patents

⚠️ This page may combine multiple inventors who share the name “HSHIEH FWU-IUAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HSHIEH FWU-IUAN

SILICONIX INC

Method of making punch-through field effect transistor

Surface mount and flip chip technology with diamond film passivation for total integated circuit isolation

Surface mount and flip chip technology for total integrated circuit isolation

Surface mount and flip chip technology for total integrated circuit isolation

High density trenched DMOS transistor

Trenched DMOS transistor fabrication having thick termination region oxide

Edge termination structure for power MOSFET

Method for making termination structure for power MOSFET

Punch-through field effect transistor

Trenched DMOS transistor having thick field oxide in termination region

Trench field effect transistor with reduced punch-through susceptibility and low RDSon

Trenched field effect transistor with PN depletion barrier

Method of making a field effect trench transistor having lightly doped epitaxial region on the surface portion thereof

Method for fabricating a short channel trenched DMOS transistor

Trenched DMOS transistor fabrication using six masks

High density trench DMOS transistor with trench bottom implant

Field effect Trench transistor having lightly doped epitaxial region on the surface portion thereof

Trenched DMOS transistor with buried layer for reduced on-resistance and ruggedness

Short channel trenched DMOS transistor

Trenched DMOS transistor with lightly doped tub

Structure of power mosfets, including termination structures

Trenched DMOS transistor with channel block at cell trench corners

Low on-resistance power MOS technology

Structure and fabrication of power MOSFETs, including termination structures

GEN SEMICONDUCTOR INC

Trench DMOS transistor with embedded trench schottky rectifier

Trench MOSFET device with improved on-resistance

Trench DMOS transistor with embedded trench schottky rectifier

Devices and methods for addressing optical edge effects in connection with etched trenches

Trench MOSFET with structure having low gate charge

Trench MOSFET with double-diffused body profile

Trench DMOS transistor with embedded trench schottky rectifier

Trench MOSFET having low gate charge

Method of forming a trench DMOS having reduced threshold voltage

Trench MOSFET having low gate charge

High speed trench DMOS

MAGEPOWER SEMICONDUCTOR CORP

Switching speed improvement in DMO by implanting lightly doped region under gate

Double gate-oxide for reducing gate-drain capacitance in trenched DMOS with high-dopant concentration buried-region under trenched gate

Enhancing DMOS device ruggedness by reducing transistor parasitic resistance and by inducing breakdown near gate runners and termination area

Trenched DMOS device provided with body-dopant redistribution-compensation region for preventing punch through and adjusting threshold voltage

Method of forming a semiconductor structure with uniform threshold voltage and punch-through tolerance

Semiconductor cell array with high packing density

Method of forming a semiconductor structure having reduced threshold voltage and high punch-through tolerance

MEGAMOS CORP

MOSFET structure and fabrication process implemented by forming deep and narrow doping regions through doping trenches

Power transistor cells provided with reliable trenched source contacts connected to narrower source manufactured without a source mask

Self-aligned and process-adjusted high density power transistor with gate sidewalls provided with punch through prevention and reduced JFET resistance

Method for device ruggedness improvement and on-resistance reduction for power MOSFET achieved by novel source contact structure

THIRD DIMENSION 3D SC INC

Method of manufacturing a superjunction device with conventional terminations

Method for manufacturing a superjunction device with wide mesas

Method of manufacturing a superjunction device

SILICONIX INORPORATED

Trench field effect transistor with reduced punch-through susceptibility and low RDSon