Inventor

PELTO CHRISTOPHER M

US16 patents

⚠️ This page may combine multiple inventors who share the name “PELTO CHRISTOPHER M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

11 patents

US11222863B2Jan 11, 2022

3D interconnect structure comprising through-silicon vias combined with fine pitch backside metal redistribution lines fabricated using a dual damascene type approach

INTEL CORP0 citations50

US12588241B2Mar 24, 2026

Asymmetric source and drain contacts for a thin film transistor (TFT) structure

INTEL CORP0 citations43

US12107040B2Oct 1, 2024

Metal insulator metal (MIM) capacitor

INTEL CORP0 citations40

LEE KEVIN J

2 patents

US9142510B2Sep 22, 2015

3D interconnect structure comprising through-silicon vias combined with fine pitch backside metal redistribution lines fabricated using a dual damascene type approach

LEE KEVIN J17 citations90

US9449913B2Sep 20, 2016

3D interconnect structure comprising fine pitch single damascene backside metal redistribution lines combined with through-silicon vias

LEE KEVIN J18 citations82

BASKARAN RAJASHREE

1 patent

US9196752B2Nov 24, 2015

Backside bulk silicon MEMS

BASKARAN RAJASHREE8 citations82

PELTO CHRISTOPHER M

1 patent

US8933564B2Jan 13, 2015

Landing structure for through-silicon via

PELTO CHRISTOPHER M6 citations65

HALLIBURTON ENERGY SERVICES INC

1 patent

US11598472B2Mar 7, 2023

Clamp on seal for water leaks

HALLIBURTON ENERGY SERVICES INC0 citations61

PELTO CHRISTOPHER M

INTEL CORP

Techniques for die stacking and associated configurations

Thickened stress relief and power distribution layer

Cooling approaches for stitched dies

Hermetic barrier surrounding a plurality of dies

Package architecture for quasi-monolithic chip with backside power

Packaging architecture with intermediate routing layers

Thickened stress relief and power distribution layer

Backside bulk silicon MEMS

3D interconnect structure comprising through-silicon vias combined with fine pitch backside metal redistribution lines fabricated using a dual damascene type approach

Asymmetric source and drain contacts for a thin film transistor (TFT) structure

Metal insulator metal (MIM) capacitor

LEE KEVIN J

3D interconnect structure comprising through-silicon vias combined with fine pitch backside metal redistribution lines fabricated using a dual damascene type approach

3D interconnect structure comprising fine pitch single damascene backside metal redistribution lines combined with through-silicon vias

BASKARAN RAJASHREE

Backside bulk silicon MEMS

PELTO CHRISTOPHER M

Landing structure for through-silicon via

HALLIBURTON ENERGY SERVICES INC

Clamp on seal for water leaks