Inventor
BHIRAVABHATLA KALYAN KUMAR
IN10 patents
Patents
10 patentsUS11037358B1Jun 15, 2021
Methods and apparatus for reducing memory bandwidth in multi-pass tessellation
QUALCOMM INC3 citations65
US12518465B2Jan 6, 2026
Efficiently handling restart indices during tile-based deferred rendering (TBDR) by graphics processing units (GPUs)
QUALCOMM INC0 citations52
US11908079B2Feb 20, 2024
Variable rate tessellation
QUALCOMM INC0 citations52
US12079897B2Sep 3, 2024
Visibility generation improvements in tile based GPU architectures
QUALCOMM INC0 citations47
US11893654B2Feb 6, 2024
Optimization of depth and shadow pass rendering in tile based architectures
QUALCOMM INC0 citations47
US11734787B2Aug 22, 2023
Foveated binned rendering associated with sample spaces
QUALCOMM INC0 citations47
US11682109B2Jun 20, 2023
Configurable apron support for expanded-binning
QUALCOMM INC0 citations46
US11600002B2Mar 7, 2023
Bin filtering
QUALCOMM INC0 citations46
US11615504B2Mar 28, 2023
Methods and apparatus for scalable primitive rate architecture for geometry processing
QUALCOMM INC0 citations44
US11631215B2Apr 18, 2023
Methods and apparatus for edge compression anti-aliasing
QUALCOMM INC0 citations43