Inventor

CHANG MIKE F

US50 patents

⚠️ This page may combine multiple inventors who share the name “CHANG MIKE F”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHANG MIKE F

SILICONIX INC

Method of making punch-through field effect transistor

Surface mount and flip chip technology with diamond film passivation for total integated circuit isolation

Surface mount and flip chip technology for total integrated circuit isolation

Surface mount and flip chip technology for total integrated circuit isolation

High density trenched DMOS transistor

Trenched DMOS transistor fabrication having thick termination region oxide

Punch-through field effect transistor

Trenched DMOS transistor having thick field oxide in termination region

Trench field effect transistor with reduced punch-through susceptibility and low RDSon

Trenched field effect transistor with PN depletion barrier

Method of making a field effect trench transistor having lightly doped epitaxial region on the surface portion thereof

Method for fabricating a short channel trenched DMOS transistor

Trenched DMOS transistor fabrication using six masks

High density trench DMOS transistor with trench bottom implant

Field effect Trench transistor having lightly doped epitaxial region on the surface portion thereof

Trenched DMOS transistor with buried layer for reduced on-resistance and ruggedness

Short channel trenched DMOS transistor

Optimization of BV and RDS-on by graded doping in LDD and other high voltage ICs

Trenched DMOS transistor with lightly doped tub

Trenched DMOS transistor with channel block at cell trench corners

Metal crossover in high voltage IC with graduated doping control

Method of operation of punch-through field effect transistor

Long channel trench-gated power MOSFET having fully depleted body region

Method of forming vertical planar DMOSFET with self-aligned contact

Low temperature oxide layer over field implant mask

Reliability test method for semiconductor trench devices

Method of forming a lateral field effect transistor having reduced drain-to-source on-resistance

Low temperature oxide layer over field implant mask

Method of fabricating a field effect transistor

Planar DMOS transistor fabricated by a three mask process

GEN ELECTRIC

Method of making a power IC structure with enhancement and/or CMOS logic

Semiconductor device and method of fabrication

IGT and MOSFET devices having reduced channel width

Droplet migration doping using reactive carriers and dopants

Post TGZM surface etch

Post diffusion after temperature gradient zone melting

Semiconductor device manufacture

Uniform migration of an annular shaped molten zone through a solid body

Method for cleaning semiconductor devices

Open tube aluminum diffusion

Selective open tube aluminum diffusion

Semiconductor device manufacture

Temperature gradient zone melting through an oxide layer

Semiconductor device manufacture

Process for thermal gradient zone melting utilizing a beveled wafer and a beveled guard ring

Open tube aluminum oxide disc diffusion

Guard ring for TGZM processing

ALPHA & OMEGA SEMICONDUCTOR

Power semiconductor package

Inverted J-lead for power devices

SILICONIX INORPORATED

Trench field effect transistor with reduced punch-through susceptibility and low RDSon