Inventor

FENOUILLET-BERANGER CLAIRE

FR38 patents

⚠️ This page may combine multiple inventors who share the name “FENOUILLET-BERANGER CLAIRE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FENOUILLET-BERANGER CLAIRE

COMMISSARIAT ENERGIE ATOMIQUE

SOI transistor with self-aligned ground plane and gate and buried oxide of variable thickness

Method for producing interconnections for 3D integrated circuit

Method for fabricating auto-aligned interconnection elements for a 3D integrated circuit

Manufacturing of self aligned interconnection elements for 3D integrated circuits

Method for producing field effect transistors with a back gate and semiconductor device

Internal via with improved contact for upper semi-conductor layer of a 3D circuit

Device with transistors distributed over several superimposed levels integrating a resistive memory

Integrated circuit on SOI comprising a transistor protecting from electrostatic discharges

Compact field effect transistor with counter-electrode and fabrication method

Method for manufacturing a microelectronic device

SOI integrated circuit equipped with a device for protecting against electrostatic discharges

Fabrication method of a stack of electronic devices

Manufacturing processing for an isolated transistor with strained channel

Method of fabrication of a FET transistor having an overlapped gate

Superimposed transistors with auto-aligned active zone of the upper transistor

Method for producing a multilevel microelectronic structure

Method for producing a field effect device having self-aligned electrical connections with respect to the gate electrode

Semiconductor and metal alloy interconnections for a 3D circuit

Integrated circuit having a plurality of active layers and method of fabricating the same

ST MICROELECTRONICS CROLLES 2

MOSFET on SOI device

MOS transistor manufacturing

MOS transistor manufacturing

Method for manufacturing a hybrid SOI/bulk semiconductor wafer

Process for producing an MOS transistor and corresponding integrated circuit

COMMISSARIAT L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

ON-SOI integrated circuit comprising a thyristor (SCR) for protection against electrostatic discharges

On-SOI integrated circuit equipped with a device for protecting against electrostatic discharges

On-SOI integrated circuit comprising a lateral diode for protection against electrostatic discharges

On-SOI integrated circuit comprising a triac for protection against electrostatic discharges

Integrated circuit on SOI comprising a bipolar transistor with isolating trenches of distinct depths

ST MICROELECTRONICS SA

Back-lit image sensor with a uniform substrate temperature

Manufacturing method of semiconductor-on-insulator region structures

Commissariat à l'énergie atomique et aux énergies alternatives

On-SOI integrated circuit comprising a subjacent protection transistor

Process for fabricating an integrated circuit having trench isolations with different depths

Commissariat à l'Energie Atomique et aux Energies Alternatives

Fabrication method of a stack of electronic devices

Fabrication method of a stack of electronic devices

COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT

Method for producing a field effect transistor including forming a gate after forming the source and drain

CORONEL PHILIPPE

Substrate provided with a semi-conducting area associated with two counter-electrodes and device comprising one such substrate

THOMAS OLIVIER

SRAM memory cell with four transistors provided with a counter-electrode