Inventor

CORONEL PHILIPPE

FR98 patents

⚠️ This page may combine multiple inventors who share the name “CORONEL PHILIPPE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CORONEL PHILIPPE

ST MICROELECTRONICS SA

Back-lit image sensor with a uniform substrate temperature

Isolating trench and manufacturing process

Surround-gate semiconductor device encapsulated in an insulating medium

Integrated circuit comprising an auxiliary component, for example a passive component or a microelectromechanical system, placed above an electronic chip, and the corresponding fabrication process

Method for production process for the local interconnection level using a dielectric conducting pair on pair

Component containing a baw filter

High-density MOS transistor

Ram

Method for manufacturing an integrated circuit with fully depleted and partially depleted transistors

Method for forming a strongly-conductive buried layer in a semiconductor substrate

Manufacturing method of semiconductor-on-insulator region structures

Electronic components and method of fabricating the same

COMMISSARIAT ENERGIE ATOMIQUE

SOI transistor with self-aligned ground plane and gate and buried oxide of variable thickness

Thermal energy harvesting optimisation with bistable elements and collaborative behavior

Method for producing interconnections for 3D integrated circuit

Device for converting heat energy into electrical energy with heat-sensitive molecules

Method for fabricating auto-aligned interconnection elements for a 3D integrated circuit

Device with deformable shell including an internal piezoelectric circuit

Method for producing field effect transistors with a back gate and semiconductor device

Graphene interposer and method of manufacturing such an interposer

Thermal energy harvesting optimization with bistable elements and collaborative behavior

IBM

Apparatus for monitoring the dry etching of a dielectric film to a given thickness in an integrated circuit

Method and system for semiconductor wafer fabrication process real-time in-situ interactive supervision

Method for real-time in-situ monitoring of a trench formation process

Method of fabricating a Si3N4/polycide structure using a dielectric sacrificial layer as a mask

Method for planarizing TEOS SiO2 filled shallow isolation trenches

Method of forming STI oxide regions and alignment marks in a semiconductor structure with one masking step

Method for buried plate formation in deep trench capacitors

Method of forming buried straps in DRAMs

ST MICROELECTRONICS CROLLES 2

Method of manufacturing a buried-gate semiconductor device and corresponding integrated circuit

MOSFET on SOI device

Formation of shallow siGe conduction channel

MOS transistor manufacturing

Method of fabricating a buried-gate semiconductor device and corresponding integrated circuit

MOS transistor manufacturing

Process for forming a wire portion in an integrated electronic circuit

SAVELLI GUILLAUME

Optimized thermoelectric module for operation in peltier mode or in seebeck mode

Cooling device equipped with a thermoelectric sensor

Modulatable thermoelectric device

CORONEL PHILIPPE

Assembly of two parts of an integrated electronic circuit

Method for manufacturing a transistor with parallel semiconductor nanofingers

PERRAUD SIMON

Method for eliminating the metal catalyst residues on the surface of wires produced by catalytic growth

NXP BV

Manufacturing method for planar independent-gate or gate-all-around transistors

OUKASSI SAMI

Microbattery and method for manufacturing same

PHAN HAI TRIEU

Device forming a manometer intended for measuring biphasic fluid pressure, associated method of manufacture and fluidic network

MULLER MARKUS GERHARD ANDREAS

FinFET with two independent gates and method for fabricating the same

COMMISSARIAT A L ERNERGIE ATOM

Method for forming, under a thin layer of a first material, portions of another material and/or empty areas

WACQUEZ ROMAIN

Method for producing stacked and self-aligned components on a substrate

COUDRAIN PERCEVAL

Method for forming an integrated circuit level by sequential tridimensional integration

GWOZIECKI ROMAIN

Organic dual-gate memory and method for producing same