Inventor
PATTIN JAY C
US6 patents
Patents
6 patentsUS5745913AApr 28, 1998
Multi-processor DRAM controller that prioritizes row-miss requests to stale banks
EXPONENTIAL TECHN INC207 citations98
US5481684AJan 2, 1996
Emulating operating system calls in an alternate instruction set using a modified code segment descriptor
EXPONENTIAL TECHN INC231 citations98
US5692152ANov 25, 1997
Master-slave cache system with de-coupled data and tag pipelines and loop-back
EXPONENTIAL TECHN INC106 citations97
US5551001AAug 27, 1996
Master-slave cache system for instruction and data cache memories
EXPONENTIAL TECHN INC132 citations96
US5784590AJul 21, 1998
Slave cache having sub-line valid bits updated by a master cache
EXPONENTIAL TECHN INC78 citations95
US5644752AJul 1, 1997
Combined store queue for a master-slave cache system
EXPONENTIAL TECHN INC80 citations94