Inventor
HAN CHUNG-CHYUNG
US11 patents
⚠️ This page may combine multiple inventors who share the name “HAN CHUNG-CHYUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEGRATED DEVICE TECH
8 patentsUS5793088AAug 11, 1998
Structure for controlling threshold voltage of MOSFET
INTEGRATED DEVICE TECH98 citations97
US5654213AAug 5, 1997
Method for fabricating a CMOS device
INTEGRATED DEVICE TECH26 citations92
US5831313ANov 3, 1998
Structure for improving latch-up immunity and interwell isolation in a semiconductor device
INTEGRATED DEVICE TECH35 citations90
US6063676AMay 16, 2000
Mosfet with raised source and drain regions
INTEGRATED DEVICE TECH17 citations81
US6127710AOct 3, 2000
CMOS structure having a gate without spacers
INTEGRATED DEVICE TECH11 citations73
US6017785AJan 25, 2000
Method for improving latch-up immunity and interwell isolation in a semiconductor device
INTEGRATED DEVICE TECH8 citations73
US5750424AMay 12, 1998
Method for fabricating a CMOS device
INTEGRATED DEVICE TECH10 citations73
US6043129AMar 28, 2000
High density MOSFET with raised source and drain regions
INTEGRATED DEVICE TECH6 citations60
WU ALBERT
2 patentsUS9257410B2Feb 9, 2016
Package assembly including a semiconductor substrate in which a first portion of a surface of the semiconductor substrate is recessed relative to a second portion of the surface of the semiconductor substrate to form a recessed region in the semiconductor substrate
WU ALBERT2 citations62
US9034730B2May 19, 2015
Recessed semiconductor substrates and associated techniques
WU ALBERT0 citations51