Inventor
THORP TYLER
US40 patents
⚠️ This page may combine multiple inventors who share the name “THORP TYLER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SUN MICROSYSTEMS INC
21 patentsUS6566758B1May 20, 2003
Current crowding reduction technique for flip chip package technology
SUN MICROSYSTEMS INC15 citations84
US6721936B2Apr 13, 2004
Shield assignment using preferential shields
SUN MICROSYSTEMS INC7 citations74
US6640331B2Oct 28, 2003
Decoupling capacitor assignment technique with respect to leakage power
SUN MICROSYSTEMS INC7 citations74
US6629306B2Sep 30, 2003
Signal routing based approach for increasing decoupling capacitance using preferential shielding
SUN MICROSYSTEMS INC7 citations74
US6473883B1Oct 29, 2002
Integrated circuit performance and reliability using angle measurement for a patterned bump layout on a power grid
SUN MICROSYSTEMS INC9 citations74
US6604226B2Aug 5, 2003
Verifying on-chip decoupling capacitance using transistor and capacitor surface area information
SUN MICROSYSTEMS INC10 citations71
US6701488B2Mar 2, 2004
Reducing I/O supply noise with digital control
SUN MICROSYSTEMS INC5 citations63
US6694493B2Feb 17, 2004
Decoupling capacitance assignment technique with minimum leakage power
SUN MICROSYSTEMS INC2 citations63
US6658629B1Dec 2, 2003
Technique for optimizing decoupling capacitance subject to leakage power constraints
SUN MICROSYSTEMS INC3 citations63
US6653857B2Nov 25, 2003
Increasing implicit decoupling capacitance using asymmetric shieldings
SUN MICROSYSTEMS INC6 citations63
US6628138B2Sep 30, 2003
Increasing decoupling capacitance using preferential shields
SUN MICROSYSTEMS INC6 citations63
US6577002B1Jun 10, 2003
180 degree bump placement layout for an integrated circuit power grid
SUN MICROSYSTEMS INC2 citations63
US6563336B1May 13, 2003
Signal shielding assignment technique for precharge based logic
SUN MICROSYSTEMS INC2 citations63
US6541873B1Apr 1, 2003
90 degree bump placement layout for an integrated circuit power grid
SUN MICROSYSTEMS INC2 citations63
US6495926B1Dec 17, 2002
60 degree bump placement layout for an integrated circuit power grid
SUN MICROSYSTEMS INC2 citations63
US6897563B2May 24, 2005
Current crowding reduction technique using selective current injection
SUN MICROSYSTEMS INC6 citations54
US7155695B2Dec 26, 2006
Signal shielding technique using active shields for non-interacting driver design
SUN MICROSYSTEMS INC0 citations52
US6762505B2Jul 13, 2004
150 degree bump placement layout for an integrated circuit power grid
SUN MICROSYSTEMS INC0 citations52
US6687886B2Feb 3, 2004
Logic optimization for preferential shields
SUN MICROSYSTEMS INC1 citations52
US6617699B2Sep 9, 2003
120 degree bump placement layout for an integrated circuit power grid
SUN MICROSYSTEMS INC1 citations52
US6694499B2Feb 17, 2004
Verifying decoupling capacitance using a maximum flow determination of a network
SUN MICROSYSTEMS INC0 citations50
SANDISK 3D LLC
16 patentsUS7656734B2Feb 2, 2010
Methods and apparatus for extending the effective thermal operating range of a memory
SANDISK 3D LLC81 citations98
US7391638B2Jun 24, 2008
Memory device for protecting memory cells during programming
SANDISK 3D LLC42 citations93
US7558129B2Jul 7, 2009
Device with load-based voltage generation
SANDISK 3D LLC21 citations90
US8040721B2Oct 18, 2011
Creating short program pulses in asymmetric memory arrays
SANDISK 3D LLC9 citations84
US7999529B2Aug 16, 2011
Methods and apparatus for generating voltage references using transistor threshold differences
SANDISK 3D LLC9 citations84
US7870472B2Jan 11, 2011
Methods and apparatus for employing redundant arrays to configure non-volatile memory
SANDISK 3D LLC12 citations84
US7593249B2Sep 22, 2009
Memory device for protecting memory cells during programming
SANDISK 3D LLC8 citations84
US7773446B2Aug 10, 2010
Methods and apparatus for extending the effective thermal operating range of a memory
SANDISK 3D LLC6 citations74
US7515488B2Apr 7, 2009
Method for load-based voltage generation
SANDISK 3D LLC7 citations71
US7870471B2Jan 11, 2011
Methods and apparatus for employing redundant arrays to configure non-volatile memory
SANDISK 3D LLC2 citations63
US7843729B2Nov 30, 2010
Methods and apparatus for using a configuration array similar to an associated data array
SANDISK 3D LLC4 citations63
US7697329B2Apr 13, 2010
Methods and apparatus for using a configuration array similar to an associated data array
SANDISK 3D LLC6 citations63
US7589989B2Sep 15, 2009
Method for protecting memory cells during programming
SANDISK 3D LLC6 citations63
US7580296B2Aug 25, 2009
Load management for memory device
SANDISK 3D LLC4 citations60
US8379437B2Feb 19, 2013
Flexible multi-pulse set operation for phase-change memories
SANDISK 3D LLC0 citations52
US7580298B2Aug 25, 2009
Method for managing electrical load of an electronic device
SANDISK 3D LLC0 citations50