P

Inventor

ANDERSON JASON H

CA27 patents
⚠️ This page may combine multiple inventors who share the name “ANDERSON JASON H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

XILINX INC

22 patents
US6851101B1Feb 1, 2005

Method for computing and using future costing data in signal routing

XILINX INC76 citations98
US7653891B1Jan 26, 2010

Method of reducing power of a circuit

XILINX INC58 citations97
US7143380B1Nov 28, 2006

Method for application of network flow techniques under constraints

XILINX INC97 citations97
US7134112B1Nov 7, 2006

Incremental routing in integrated circuit design

XILINX INC21 citations92
US7111268B1Sep 19, 2006

Post-layout optimization in integrated circuit design

XILINX INC48 citations92
US6871336B1Mar 22, 2005

Incremental placement of design objects in integrated circuit design

XILINX INC26 citations92
US7735047B1Jun 8, 2010

Method for technology mapping considering boolean flexibility

XILINX INC15 citations84
US6857115B1Feb 15, 2005

Placement of objects with partial shape restriction

XILINX INC15 citations84
US6289496B1Sep 11, 2001

Placement of input-output design objects into a programmable gate array supporting multiple voltage standards

XILINX INC17 citations82
US8671379B1Mar 11, 2014

Multi-threaded deterministic router

XILINX INC6 citations81
US6993737B1Jan 31, 2006

Leakage power optimization for integrated circuits

XILINX INC17 citations80
US7073155B1Jul 4, 2006

Method for computing and using future costing data in signal routing

XILINX INC9 citations74
US7603646B1Oct 13, 2009

Method and apparatus for power optimization using don't care conditions of configuration bits in lookup tables

XILINX INC7 citations73
US7306977B1Dec 11, 2007

Method and apparatus for facilitating signal routing within a programmable logic device

XILINX INC7 citations73
US6484298B1Nov 19, 2002

Method and apparatus for automatic timing-driven implementation of a circuit design

XILINX INC11 citations73
US6983439B1Jan 3, 2006

Unified placer infrastructure

XILINX INC5 citations72
US6625795B1Sep 23, 2003

Method and apparatus for placement of input-output design objects into a programmable gate array

XILINX INC9 citations72
US6877040B1Apr 5, 2005

Method and apparatus for testing routability

XILINX INC9 citations71
US7555734B1Jun 30, 2009

Processing constraints in computer-aided design for integrated circuits

XILINX INC2 citations63
US7797665B1Sep 14, 2010

Patterns for routing nets in a programmable logic device

XILINX INC3 citations62
US7725868B1May 25, 2010

Method and apparatus for facilitating signal routing within a programmable logic device

XILINX INC3 citations62
US7398496B1Jul 8, 2008

Unified placer infrastructure

XILINX INC2 citations58

ANDERSON JASON H

3 patents

WANG QIANG

1 patent

JAIN GITU

1 patent