Inventor

BATHAN HENRY D

SG54 patents

⚠️ This page may combine multiple inventors who share the name “BATHAN HENRY D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BATHAN HENRY D

STATS CHIPPAC LTD

Leadframe design for QFN package with top terminal leads

Semiconductor device with optical sensor and method of forming interconnect structure on front and backside of the device

Stackable integrated circuit package system with recess

Method of forming a wafer level package with RDL interconnection over encapsulant between bump and semiconductor die

Integrated circuit package system with interconnect support

Integrated circuit package system with heat sink

Multiple flip-chip integrated circuit package system

Leadframe interposer over semiconductor die and TSV substrate for vertical electrical interconnect

Method and apparatus for a package having multiple stacked die

Integrated circuit package system with stiffener

Integrated circuit package system with heat sink

Semiconductor package and method of forming similar structure for top and bottom bonding pads

Integrated circuit package system with leadfinger support

Integrated circuit package with elevated edge leadframe

Overhang integrated circuit package system

Integrated circuit package system with adhesive restraint

Leadframe design for QFN package with top terminal leads

Optical semiconductor device having pre-molded leadframe with window and method therefor

Non-leaded integrated circuit package system with multiple ground sites

Integrated circuit package system with laminate base

Integrated circuit package system with lead structures including a dummy tie bar

Integrated circuit package system with ground ring

Semiconductor device and method of forming overlapping semiconductor die with coplanar vertical interconnect structure

Integrated circuit packaging system including a non-leaded package

Integrated circuit leadless package system

Semiconductor device and method of forming a wafer level package with top and bottom solder bump interconnection

Integrated circuit package system

Integrated circuit package system with integrated circuit support

CAMACHO ZIGMUND R

Semiconductor device and method of forming wafer-level multi-row etched leadframe with base leads and embedded semiconductor die

Semiconductor device and method of forming leadframe interposer over semiconductor die and TSV substrate for vertical electrical interconnect

Semiconductor device and method of forming EWLB package with standoff conductive layer over encapsulant bumps

Semiconductor device and method of forming wafer-level multi-row etched leadframe with base leads and embedded semiconductor die

Semiconductor device and method of forming wafer level multi-row etched lead package

Semiconductor device with optical sensor and method of forming interconnect structure on front and backside of the device

Semiconductor device and method of forming a wafer level package with top and bottom solder bump interconnection

Optical semiconductor device having pre-molded leadframe with window and method therefor

Optical semiconductor device having pre-molded leadframe with window and method therefor

Semiconductor device with optical sensor and method of forming interconnect structure on front and backside of the device

Semiconductor device with bump interconnection

CAMACHO ZIGMUND RAMIREZ

Integrated circuit package system with die on base package

Integrated circuit package system

Integrated circuit package system with laminate base

Padless die support integrated circuit package system

BATHAN HENRY D

Semiconductor device and method of forming overlapping semiconductor die with coplanar vertical interconnect structure

Semiconductor device and method of forming leadframe with notched fingers for stacking semiconductor die

ST ASSEMBLY TEST SERVICES INC

System for semiconductor package with stacked dies

PUNZALAN JEFFREY D

Integrated circuit package system with flashless leads

TRASPORTO ARNEL

Integrated circuit package system with multi-planar paddle

SEMTECH CORP

Semiconductor device and method of forming substrate with 3-sided wettable flank

TAY LIONEL CHIEN HUI

Semiconductor package and method of forming similar structure for top and bottom bonding pads