Inventor

SWANBERG RANDAL C

US64 patents

⚠️ This page may combine multiple inventors who share the name “SWANBERG RANDAL C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SWANBERG RANDAL C

IBM

Hypervisor-enforced isolation of entities within a single logical partition&#39;s virtual address space

Wake-and-go mechanism with exclusive system bus response

Customized electronic product configuration

Enabling poll/select style interfaces with coherent accelerators

Enabling poll/select style interfaces with coherent accelerators

Load-through fault mechanism

Dynamic allocation of a direct memory address window

Transparent update of adapter firmware for self-virtualizing input/output device

Customized electronic product configuration

Intelligent context management

Flash memory management

Addressing for inter-thread push communication

Method to share a coherent accelerator context inside the kernel

Customized electronic product configuration

Wake-and-go mechanism with data monitoring

Processor and memory folding for managing power consumption in information processing systems

Memory move instruction sequence targeting an accelerator switchboard

Non-uniform memory access (NUMA) enhancements for shared logical partitions

Customized electronic product configuration

Resolving page faults out of context

Flash memory management

Addressing for inter-thread push communication

Method to share a coherent accelerator context inside the kernel

Method to share a coherent accelerator context inside the kernel

Method to share a coherent accelerator context inside the kernel

Initiating software applications requiring different processor architectures in respective isolated execution environment of an operating system

Address translation/specification field for hardware accelerator

ARIMILLI RAVI K

Hardware wake-and-go mechanism with look-ahead polling

Hardware wake-and-go mechanism for a data processing system

Wake-and-go mechanism with system address bus transaction master

Programming idiom accelerator for remote update

Migrating sleeping and waking threads between wake-and-go mechanisms in a multiple processor data processing system

CAM-based wake-and-go snooping engine for waking a thread put to sleep for spinning on a target address lock

Central repository for wake-and-go mechanism

Wake-and-go mechanism with data exclusivity

Wake-and-go mechanism with prioritization of threads

Complex remote update programming idiom accelerator

Wake-and-go mechanism with system bus response

Programming idiom accelerator to examine pre-fetched instruction streams for multiple processors

Wake-and-go mechanism with dynamic allocation in hardware private array

Wake-and-go mechanism with hardware private array

ARMSTRONG WILLIAM J

Partition adjunct for data processing system

Transparent update of adapter firmware for self-virtualizing input/output device

Partition adjunct with non-native device driver for facilitating access to a physical input/output device

Client partition scheduling and prioritization of service partition work

Client partition scheduling and prioritization of service partition work

Multiple partition adjunct instances interfacing multiple logical partitions to a self-virtualizing input/output device

Partition adjunct for data processing system

FLOYD MICHAEL S

Performing virtual and/or physical resource management for power management

CAIN III HAROLD W

Transactional memory system supporting unbroken suspended execution

Hypervisor-enforced isolation of entities within a single logical partition's virtual address space