Inventor

MEIR AVRAHAM POZA

IL30 patents

⚠️ This page may combine multiple inventors who share the name “MEIR AVRAHAM POZA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MEIR AVRAHAM POZA

APPLE INC

Programmable peak-current control in non-volatile memory devices

Programmable peak-current control in non-volatile memory devices

Data storage in a memory block following WL-WL short

Identifying word-line-to-substrate and word-line-to-word-line short-circuit events in a memory block

Power shutdown prediction for non-volatile storage devices

Redundancy schemes for non-volatile memory using parity zones having new and old parity blocks

Solid state drive with self-refresh power saving mode

Techniques for reducing power-down time in non-volatile memory devices

Mitigation of retention drift in charge-trap non-volatile memory

Mitigation of data retention drift by progrmming neighboring memory cells

Power shutdown prediction for non-volatile storage devices

Selection of redundant storage configuration based on available memory space

Memory system with shared file system

Uneven wear leveling in analog memory devices

Enhanced data storage in 3-D memory using string-specific source-side biasing

Independent management of data and parity logical block addresses

Mitigation of data retention drift by programming neighboring memory cells

Mitigation of data retention drift by programming neighboring memory cells

Programming schemes for 3-D non-volatile memory

Hinting of deleted data from host to storage device

Memory device readout using multiple sense times

Protection and recovery from sudden power failure in non-volatile memory devices

Selection of redundant storage configuration based on available memory space

Mitigating reliability degradation of analog memory cells during long static and erased state retention

Mitigating reliability degradation of analog memory cells during long static and erased state retention

Storage in charge-trap memory structures using additional electrically-charged regions

Quality-of-service management in power-throttled storage devices

Storage in charge-trap memory structures using additional electrically-charged regions

Hardware-based performance equalization for storage devices

MEIR AVRAHAM POZA

Redundancy schemes for non-volatile memory based on physical memory layout