Inventor

DOLNY GARY M

US31 patents

⚠️ This page may combine multiple inventors who share the name “DOLNY GARY M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DOLNY GARY M

FAIRCHILD SEMICONDUCTOR

Trench-gate field effect transistors and methods of forming the same

Semiconductor power device having a top-side drain using a sinker trench

Buried gate-field termination structure

Method of forming trench-gate field effect transistors

Semiconductor power device having a top-side drain using a sinker trench

Trench-gate field effect transistor with channel enhancement region and methods of forming the same

Dense trench MOSFET with decreased etch sensitivity to deposition and etch processing

Trench FET with improved body to gate alignment

Power MOS device with buried gate

Dense trench MOSFET with decreased etch sensitivity to deposition and etch processing

Power MOS device with buried gate and groove

Quick punch through IGBT having gate-controllable DI/DT and reduced EMI during inductive turn off

Trench-gate field effect transistor

Power transistor with trench sinker for contacting the backside

Lateral MOSFET with substrate drain connection

SILICET LLC

Devices for LDMOS and other MOS transistors with hybrid contact

Methods for LDMOS and other MOS transistors with hybrid contact

Devices and methods for a power transistor having a Schottky or Schottky-like contact

Devices and methods for a power transistor having a schottky or schottky-like contact

GREBS THOMAS E

Shielded gate field effect transistors

Methods of forming inter-poly dielectric (IPD) layers in power semiconductor devices

Semiconductor power device having a top-side drain using a sinker trench

AMPLEXIA LLC

LDMOS with self-aligned body and hybrid source

MOSFET transistors with hybrid contact

LDMOS with self-aligned body and hybrid source

RCA CORP

Method for fabricating bidirectional vertical power MOS device

Bidirectional vertical power MOS device and fabrication method

SARNOFF DAVID RES CENTER

Method for fabricating a switching transistor having a capacitive network proximate a drift region

YILMAZ HAMZA

Structure and method for forming trench-gate field effect transistor with source plug

GEN ELECTRIC

Structure for a complementary-symmetry COMFET pair

REXER CHRISTOPHER L

Rugged semiconductor device architecture