Inventor
KAUSHIK ARVIND
IN30 patents
⚠️ This page may combine multiple inventors who share the name “KAUSHIK ARVIND”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
FREESCALE SEMICONDUCTOR INC
9 patentsUS9332567B1May 3, 2016
System for recovering unresponsive common public radio interface (CPRI) nodes
FREESCALE SEMICONDUCTOR INC9 citations81
US9490880B1Nov 8, 2016
Hardware-based time alignment of wireless links
FREESCALE SEMICONDUCTOR INC4 citations66
US10261924B2Apr 16, 2019
Communication system for transmitting and receiving control frames
FREESCALE SEMICONDUCTOR INC1 citations60
US10070465B2Sep 4, 2018
Apparatus for reception and detection of random access channel (RACH) data
FREESCALE SEMICONDUCTOR INC0 citations40
US10045366B2Aug 7, 2018
Scheduler for layer mapped code words
FREESCALE SEMICONDUCTOR INC0 citations40
US9893714B2Feb 13, 2018
Configurable FIR filter with segmented cells
FREESCALE SEMICONDUCTOR INC0 citations39
US9788314B2Oct 10, 2017
Base transceiver station for reducing congestion in communcation network
FREESCALE SEMICONDUCTOR INC0 citations39
US9392640B2Jul 12, 2016
Method and system for automatically controlling the insertion of control word in CPRI daisy chain configuration
FREESCALE SEMICONDUCTOR INC0 citations36
US9785368B1Oct 10, 2017
System and method for mapping control and user data
FREESCALE SEMICONDUCTOR INC0 citations35
NXP USA INC
9 patentsUS11252108B2Feb 15, 2022
Controller for ordering out-of-order transactions in SoC
NXP USA INC2 citations70
US10862814B2Dec 8, 2020
Exception handling in a multi-user wireless communication device based on user tag values
NXP USA INC1 citations62
US11429437B2Aug 30, 2022
System for arbitrating between multiple flows
NXP USA INC1 citations61
US11113219B2Sep 7, 2021
Protocol data unit end handling with fractional data alignment and arbitration fairness
NXP USA INC1 citations58
US11775467B2Oct 3, 2023
System and method for ordering transactions in system-on-chips
NXP USA INC0 citations50
US11507491B2Nov 22, 2022
System for controlling data flow between multiple processors
NXP USA INC0 citations47
US12175283B2Dec 24, 2024
Hardware-accelerated computing system
NXP USA INC0 citations45
US12073221B2Aug 27, 2024
Context switching method and system for swapping contexts between register sets based on thread halt
NXP USA INC0 citations44
US11861403B2Jan 2, 2024
Method and system for accelerator thread management
NXP USA INC0 citations43