Inventor

PONOTH SHOM

US203 patents

⚠️ This page may combine multiple inventors who share the name “PONOTH SHOM”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PONOTH SHOM

IBM

FinFETs and fin isolation structures

Sub-lithographic semiconductor structures with non-constant pitch

Bulk fin-field effect transistors with well defined isolation

Fin isolation in multi-gate field effect transistors

Bulk fin-field effect transistors with well defined isolation

Single fin cut employing angled processing methods

Bulk fin-field effect transistors with well defined isolation

Metal alloy cap integration

Method of forming finFET of variable channel width

Forming interconnects with air gaps

Method for manufacturing interconnect structures incorporating air gap spacers

Formation of isolation surrounding well implantation

FinFET with dielectric isolation by silicon-on-nothing and method of fabrication

Prevention of fin erosion for semiconductor devices

Dual shallow trench isolation liner for preventing electrical shorts

FinFET with dielectric isolation by silicon-on-nothing and method of fabrication

Dummy fin formation by gas cluster ion beam

Dual-metal self-aligned wires and vias

Self-aligned dielectric isolation for FinFET devices

Hybrid copper interconnect structure and method of fabricating same

Sealed air gap for semiconductor chip

Stress enhanced finFET devices

Dual mandrel sidewall image transfer processes

Air-dielectric for subtractive etch line and via metallization

Uniform finFET gate height

GLOBALFOUNDRIES INC

Methods of forming replacement gate structures for transistors and the resulting devices

Methods of forming gate structures for FinFET devices and the resulting semiconductor products

Gate structures with protected end surfaces to eliminate or reduce unwanted EPI material growth

Methods of forming FinFET semiconductor devices with self-aligned contact elements using a replacement gate process and the resulting devices

Dummy fin formation by gas cluster ion beam

Sub-lithographic semiconductor structures with non-constant pitch

Contact formation for ultra-scaled devices

Integrated circuits and methods for fabricating integrated circuits having metal gate electrodes

CHENG KANGGUO

Bulk fin-field effect transistors with well defined isolation

Bulk fin-field effect transistors with well defined isolation

MOS capacitors with a finfet process

Self aligned contact with improved robustness

FinFET with self-aligned punchthrough stopper

YANG CHIH-CHAO

Pad bonding employing a self-aligned plated liner for adhesion enhancement

Hybrid copper interconnect structure and method of fabricating same

Method of fabricating a profile control in interconnect structures

BASKER VEERARAGHAVAN S

Cut-very-last dual-epi flow

Cut-very-last dual-EPI flow

PONOTH SHOM

Borderless interconnect line structure self-aligned to upper and lower level contact vias

Creation of vias and trenches with different depths

EDELSTEIN DANIEL C

Microelectronic structure including air gap

Microelectronic structure including air gap

HORAK DAVID V

Sealed air gap for semiconductor chip

BREYTA GREGORY

Semiconductor structure having a contact-level air gap within the interlayer dielectrics above a semiconductor device and a method of forming the semiconductor structure using a self-assembly approach

CHANDA KAUSHIK

Air gap interconnect structures and methods for forming the same