Inventor

HORAK DAVID V

US301 patents

⚠️ This page may combine multiple inventors who share the name “HORAK DAVID V”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HORAK DAVID V

IBM

Field effect transistor

Accessible chip stack and process of manufacturing thereof

Methods for forming uniform lithographic features

Forming capping layer over metal wire structure using selective atomic layer deposition

Structure for folded architecture pillar memory cell

Trench storage dynamic random access memory cell with vertical transfer device

Structure for folded architecture pillar memory cell

Method for forming pillar memory cells and device formed thereby

DRAM cell with grooved transfer device

Method and apparatus for cleaning a semiconductor substrate in an immersion lithography system

Gate linewidth tailoring and critical dimension control for sub-100 nm devices using plasma etching

Method for interconnection between transfer devices and storage capacitors in memory cells and device formed thereby

Methods of T-gate fabrication using a hybrid resist

Resist image reversal by means of spun-on-glass

Field emission phase change diode memory

Semiconductor with nanoscale features

Method for forming cornered images on a substrate and photomask formed thereby

Contact capping local interconnect

Method of assembling a plurality of semiconductor devices having different thickness

Borderless gate structures

Interconnection structure and method for fabricating same

Structure and process for multi-chip chip attach with reduced risk of electrostatic discharge damage

Method for increasing the capacitance of a semiconductor capacitors

Multi-level DRAM trench store utilizing two capacitors and two plates

Trench storage dynamic random access memory cell with vertical transfer device

Dram cell with three-sided-gate transfer device

Frequency doubling hybrid photoresist having negative and positive tone components and method of preparing the same

Method for making a five square vertical DRAM cell

Method for making a DRAM cell with grooved transfer device

Method for forming features using frequency doubling hybrid resist and device formed thereby

High performance MOSFET device with raised source and drain

Fabrication method for high-capacitance storage node structures

Memory device and method of manufacturing the device by simultaneously conditioning transition metal oxide layers in a plurality of memory cells

Selective deposition of a conductive material

Method for forming cornered images on a substrate and photomask formed thereby

Bi-layer gate cap for self-aligned contact formation

FinFETs and fin isolation structures

Sub-lithographic semiconductor structures with non-constant pitch

Single fin cut employing angled processing methods

Metal alloy cap integration

Sub-lithographic imaging techniques and processes

Chemical and particulate filters containing chemically modified carbon nanotube structures

YANG CHIH-CHAO

Pad bonding employing a self-aligned plated liner for adhesion enhancement

Hybrid copper interconnect structure and method of fabricating same

TOKYO ELECTRON LTD

Method and system for controlling radical distribution

Method and system for controlling radical distribution

PONOTH SHOM

Borderless interconnect line structure self-aligned to upper and lower level contact vias

HORAK DAVID V

Method of forming replacement metal gate with borderless contact and structure thereof

XIE RUILONG

Formation of the dielectric cap layer for a replacement gate structure

EDELSTEIN DANIEL C

Microelectronic structure including air gap