Inventor

LOH WEI-YIP

US42 patents

⚠️ This page may combine multiple inventors who share the name “LOH WEI-YIP”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LOH WEI-YIP

TAIWAN SEMICONDUCTOR MFG CO LTD

Ammonium fluoride pre-clean protection

Method of manufacturing semiconductor devices with multiple silicide regions

Treatment for adhesion improvement

Method of forming a contact with a silicide region

Barrier-free approach for forming contact plugs

Contact structure and the method of forming the same

Semiconductor device pre-cleaning

Barrier-free approach for forming contact plugs

Contact with a silicide region

Ammonium fluoride pre-clean protection

Semiconductor device pre-cleaning

Method of manufacturing semiconductor devices with multiple silicide regions

Contact structure for semiconductor device and method

Conductive feature formation and structure

Treatment for adhesion improvement

Semiconductor device pre-cleaning

Barrier-free approach for forming contact plugs

Semiconductor devices with stacked silicide regions

Treatment for adhesion improvement

Contact with a silicide region

Contact structure for semiconductor device and method

Method for forming semiconductor contact structure

Semiconductor structure

Conductive feature formation and structure

Deposition window enlargement

Deposition window enlargement

Semiconductor device with conductive liners over silicide structures and method of making the semiconductor device

Buried conductive structure in semiconductor substrate

Semiconductor device structure and method for forming the same

Selective dual silicide formation

Selective dual silicide formation

Semiconductor structure and method for manufacturing the same

Gate to source drain interconnects

Selective silicide for stacked multi-gate device

LOH WEI-YIP

Tunneling field-effect transistor with direct tunneling for enhanced tunneling current

Apparatus, system, and method for tunneling MOSFETs using self-aligned heterostructure source and isolated drain

Interfacial barrier for work function modification of high performance CMOS devices

AGENCY SCIENCE TECH & RES

Fully salicided (FUSA) MOSFET structure

Electro-optic device with novel insulating structure and a method for manufacturing the same

SEMATECH INC

Tunneling field-effect transistor with direct tunneling for enhanced tunneling current

AGENCY FOR SCIENCE TECHNOLOLGY

Fully salicided (FUCA) MOSFET structure

AGENCY FOR SCEINCE TECHNOLOGY

Method of fabricating tensile strained layers and compressive strain layers for a CMOS device