P

Inventor

BRADLEY JOHN J

US51 patents
⚠️ This page may combine multiple inventors who share the name “BRADLEY JOHN J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HONEYWELL INF SYSTEMS

24 patents
US4495571AJan 22, 1985

Data processing system having synchronous bus wait/retry cycle

HONEYWELL INF SYSTEMS59 citations96
US4488227ADec 11, 1984

Program counter stacking method and apparatus for nested subroutines and interrupts

HONEYWELL INF SYSTEMS129 citations96
US4300193ANov 10, 1981

Data processing system having data multiplex control apparatus

HONEYWELL INF SYSTEMS82 citations96
US4677548AJun 30, 1987

LSI microprocessor chip with backward pin compatibility and forward expandable functionality

HONEYWELL INF SYSTEMS29 citations93
US4604695AAug 5, 1986

Nibble and word addressable memory arrangement

HONEYWELL INF SYSTEMS77 citations92
US4484271ANov 20, 1984

Microprogrammed system having hardware interrupt apparatus

HONEYWELL INF SYSTEMS42 citations92
US4387423AJun 7, 1983

Microprogrammed system having single microstep apparatus

HONEYWELL INF SYSTEMS32 citations92
US4384327AMay 17, 1983

Intersystem cycle control logic

HONEYWELL INF SYSTEMS36 citations92
US4340933AJul 20, 1982

Data processing system having centralized nonexistent memory address detection

HONEYWELL INF SYSTEMS36 citations92
US4321665AMar 23, 1982

Data processing system having centralized data alignment for I/O controllers

HONEYWELL INF SYSTEMS37 citations92
US4293908AOct 6, 1981

Data processing system having direct memory access bus cycle

HONEYWELL INF SYSTEMS29 citations92
US4236209ANov 25, 1980

Intersystem transaction identification logic

HONEYWELL INF SYSTEMS55 citations91
US4300194ANov 10, 1981

Data processing system having multiple common buses

HONEYWELL INF SYSTEMS28 citations82
US4292668ASep 29, 1981

Data processing system having data multiplex control bus cycle

HONEYWELL INF SYSTEMS20 citations82
US4234919ANov 18, 1980

Intersystem communication link

HONEYWELL INF SYSTEMS26 citations81
US4459665AJul 10, 1984

Data processing system having centralized bus priority resolution

HONEYWELL INF SYSTEMS18 citations74
US4351024ASep 21, 1982

Switch system base mechanism

HONEYWELL INF SYSTEMS16 citations74
US4433376AFeb 21, 1984

Intersystem translation logic system

HONEYWELL INF SYSTEMS15 citations73
US4383295AMay 10, 1983

Data processing system having data entry backspace character apparatus

HONEYWELL INF SYSTEMS15 citations73
US4604722AAug 5, 1986

Decimal arithmetic logic unit for doubling or complementing decimal operand

HONEYWELL INF SYSTEMS7 citations72
US4672360AJun 9, 1987

Apparatus and method for converting a number in binary format to a decimal format

HONEYWELL INF SYSTEMS15 citations71
US4654789AMar 31, 1987

LSI microprocessor chip with backward pin compatibility

HONEYWELL INF SYSTEMS17 citations71
US4615016ASep 30, 1986

Apparatus for performing simplified decimal multiplication by stripping leading zeroes

HONEYWELL INF SYSTEMS11 citations71
US4608659AAug 26, 1986

Arithmetic logic unit with outputs indicating invalid computation results caused by invalid operands

HONEYWELL INF SYSTEMS5 citations59

PAPER CONVERTING MACHINE CO

14 patents

CII HONEYWELL BULL

6 patents

EASTMAN KODAK CO

2 patents

INF CII HONEYWELL COMP INT

1 patent

CORNING CABLE SYS LLC

1 patent

BRADLEY FRANCES L

1 patent

GRAHAM JOHN D

1 patent

Showing the top 50 of 51 patents by PatentIndex Score.