Inventor

CHANG JICHUAN

US49 patents

⚠️ This page may combine multiple inventors who share the name “CHANG JICHUAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHANG JICHUAN

CHANG JICHUAN

Partitioning a memory pool among plural computing nodes

Hypervisor-based management of local and remote virtual memory pages

Dynamically partition a volatile memory for a cache and a memory partition

Memory server

Organizing and managing a memory blade with super pages and buffers

Data storage apparatus and methods

Data stream operations

Storage system with a memory blade that generates a computational result for a storage device

Data migration between memory locations

Storing data in presistent hybrid memory

Non-volatile memory physical networks

Write-absorbing buffer for non-volatile memory

Tier identification (TID) for tiered memory characteristics

Storing cache metadata separately from integrated circuit containing cache controller

Network management

Hardware compression using common portions of data

Reconfigurable crossbar networks

Direct memory access and super page swapping optimizations for a memory blade

HEWLETT PACKARD ENTPR DEV LP

Atomically committing write requests

Separate memory controllers to access data in memory

Smart memory buffers

Dynamic memory expansion by data compression

Cache coherence in multi-compute-engine systems

Smart memory buffers

Compressing and compacting memory on a memory device wherein compressed memory pages are organized by size

Computing devices operable on recovered waste heat

Performing write operations on main memory

Versioned memory Implementation

MURALIMANOHAR NAVEEN

Random-access memory with dynamically adjustable endurance and retention

Controlling nanostore operation based on monitored performance

Remapping data with pointer

Retention-value associated memory

HEWLETT PACKARD DEVELOPMENT CO

Memory error identification based on corrupted symbol patterns

Invoking an error handler to handle an uncorrectable error

Storing data in persistent hybrid memory

YOON DOE HYUN

Computing system reliability

Local checkpointing using a multi-level cell

Accessing memory

TOLIA NIRAJ

Methods and apparatus to access data in non-volatile memory

Managing a data structure

HEWLETT PACKARD DEVELOPMENT CO LP

Multi-level cache tracking table

Representing data using a group of multilevel memory cells

TURNER YOSHIO

Direct I/O device access by a virtual machine with memory managed using memory disaggregation

LIM KEVIN T

Remote memory for virtual machines

ROBERTS DAVID A

Optical data path systems

ROBERTS DAVID ANDREW

Managing wear on independent storage devices

GOOGLE LLC

Bit-packed array processing using SIMD

SHAH AMIP J

Managing an infrastructure housing disaggregated heat sources

MEZA JUSTIN JAMES

Computer racks