Inventor
SINGH BALRAJ
US23 patents
⚠️ This page may combine multiple inventors who share the name “SINGH BALRAJ”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
JUNIPER NETWORKS INC
11 patentsUS7526607B1Apr 28, 2009
Network acceleration and long-distance pattern detection using improved caching and disk mapping
JUNIPER NETWORKS INC126 citations97
US7873786B1Jan 18, 2011
Network acceleration and long-distance pattern detection using improved caching and disk mapping
JUNIPER NETWORKS INC81 citations96
US7158522B1Jan 2, 2007
Transparent optimization for session establishment using characterized synchronization packet
JUNIPER NETWORKS INC20 citations91
US7058058B2Jun 6, 2006
Transparent optimization for transmission control protocol initial session establishment
JUNIPER NETWORKS INC13 citations91
US7230949B2Jun 12, 2007
Efficient method and system for automatic discovery and verification of optimal paths through a dynamic multi-point meshed overlay network
JUNIPER NETWORKS INC37 citations89
US7653075B2Jan 26, 2010
Processing communication flows in asymmetrically routed networks
JUNIPER NETWORKS INC17 citations83
US7747821B1Jun 29, 2010
Network acceleration and long-distance pattern detection using improved caching and disk mapping
JUNIPER NETWORKS INC6 citations72
US7940665B2May 10, 2011
Transparent optimization for transmission control protocol flow control
JUNIPER NETWORKS INC2 citations61
US7564792B2Jul 21, 2009
Transparent optimization for transmission control protocol flow control
JUNIPER NETWORKS INC4 citations61
US7529246B1May 5, 2009
Transparent optimization for session establishment using characterized synchronization packet
JUNIPER NETWORKS INC4 citations61
US7769019B2Aug 3, 2010
Efficient discovery and verification of paths through a meshed overlay network
JUNIPER NETWORKS INC2 citations59
INFINEON TECHNOLOGIES CORP
5 patentsUS6292845B1Sep 18, 2001
Processing unit having independent execution units for parallel execution of instructions of different category with instructions having specific bits indicating instruction size and category respectively
INFINEON TECHNOLOGIES CORP30 citations89
US6981127B1Dec 27, 2005
Apparatus and method for aligning variable-width instructions with a prefetch buffer
INFINEON TECHNOLOGIES CORP10 citations74
US6393551B1May 21, 2002
Reducing instruction transactions in a microprocessor
INFINEON TECHNOLOGIES CORP8 citations73
US6694423B1Feb 17, 2004
Prefetch streaming buffer
INFINEON TECHNOLOGIES CORP6 citations60
US6038660AMar 14, 2000
Method and apparatus for updating a program counter
INFINEON TECHNOLOGIES CORP6 citations60