Inventor
CHEN CHANGYUAN
US38 patents
⚠️ This page may combine multiple inventors who share the name “CHEN CHANGYUAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SANDISK TECHNOLOGIES INC
9 patentsUS8886877B1Nov 11, 2014
In-situ block folding for nonvolatile memory
SANDISK TECHNOLOGIES INC80 citations98
US9543028B2Jan 10, 2017
Word line dependent temperature compensation scheme during sensing to counteract cross-temperature effect
SANDISK TECHNOLOGIES INC25 citations94
US9530512B2Dec 27, 2016
Temperature dependent sensing scheme to counteract cross-temperature threshold voltage distribution widening
SANDISK TECHNOLOGIES INC32 citations90
US9201788B1Dec 1, 2015
In-situ block folding for nonvolatile memory
SANDISK TECHNOLOGIES INC5 citations84
US9704595B1Jul 11, 2017
Self-detecting a heating event to non-volatile storage
SANDISK TECHNOLOGIES INC14 citations83
US9472270B2Oct 18, 2016
Nonvolatile storage reflow detection
SANDISK TECHNOLOGIES INC6 citations73
USRE46056EJul 5, 2016
Programming non-volatile storage with fast bit detection and verify skip
SANDISK TECHNOLOGIES INC2 citations62
US8830745B2Sep 9, 2014
Memory system with unverified program step
SANDISK TECHNOLOGIES INC3 citations60
US9583206B2Feb 28, 2017
Data storage device having reflow awareness
SANDISK TECHNOLOGIES INC1 citations52
SANDISK TECHNOLOGIES LLC
9 patentsUS9704588B1Jul 11, 2017
Apparatus and method for preconditioning currents to reduce errors in sensing for non-volatile memory
SANDISK TECHNOLOGIES LLC26 citations94
US10008273B2Jun 26, 2018
Cell current based bit line voltage
SANDISK TECHNOLOGIES LLC21 citations93
US9711231B1Jul 18, 2017
System solution for first read issue using time dependent read voltages
SANDISK TECHNOLOGIES LLC25 citations92
US10566059B2Feb 18, 2020
Three dimensional NAND memory device with drain select gate electrode shared between multiple strings
SANDISK TECHNOLOGIES LLC13 citations86
US10304551B2May 28, 2019
Erase speed based word line control
SANDISK TECHNOLOGIES LLC9 citations84
US10978145B2Apr 13, 2021
Programming to minimize cross-temperature threshold voltage widening
SANDISK TECHNOLOGIES LLC2 citations73
US10636501B1Apr 28, 2020
Memory device with reduced neighbor word line interference using adjustable voltage on source-side unselected word line
SANDISK TECHNOLOGIES LLC4 citations73
US10074440B2Sep 11, 2018
Erase for partially programmed blocks in non-volatile memory
SANDISK TECHNOLOGIES LLC4 citations73
US10204689B1Feb 12, 2019
Non-volatile memory with methods to reduce creep-up field between dummy control gate and select gate
SANDISK TECHNOLOGIES LLC1 citations62
SILICON STORAGE TECH INC
9 patentsUS7247907B2Jul 24, 2007
Bidirectional split gate NAND flash memory structure and array, method of programming, erasing and reading thereof, and method of manufacturing
SILICON STORAGE TECH INC24 citations92
US7544569B2Jun 9, 2009
Bidirectional split gate NAND flash memory structure and array, method of programming, erasing and reading thereof, and method of manufacturing
SILICON STORAGE TECH INC9 citations84
US7723774B2May 25, 2010
Non-diffusion junction split-gate nonvolatile memory cells and arrays, methods of programming, erasing, and reading thereof, and methods of manufacture
SILICON STORAGE TECH INC6 citations74
US7242051B2Jul 10, 2007
Split gate NAND flash memory structure and array, method of programming, erasing and reading thereof, and method of manufacturing
SILICON STORAGE TECH INC9 citations73
US7358559B2Apr 15, 2008
Bi-directional read/program non-volatile floating gate memory array, and method of formation
SILICON STORAGE TECH INC3 citations63
US9449693B2Sep 20, 2016
Split gate NAND flash memory structure and array, method of programming, erasing and reading thereof, and method of manufacturing
SILICON STORAGE TECH INC2 citations62
US7826267B2Nov 2, 2010
Method and apparatus for reading and programming a non-volatile memory cell in a virtual ground array
SILICON STORAGE TECH INC5 citations60
US9892790B2Feb 13, 2018
Method of programming a continuous-channel flash memory device
SILICON STORAGE TECH INC0 citations52
US7808839B2Oct 5, 2010
Split gate NAND flash memory structure and array, method of programming, erasing and reading thereof, and method of manufacturing
SILICON STORAGE TECH INC0 citations52
WESTERN DIGITAL TECH INC
6 patentsUS9972396B1May 15, 2018
System and method for programming a memory device with multiple writes without an intervening erase
WESTERN DIGITAL TECH INC37 citations92
US10304559B2May 28, 2019
Memory write verification using temperature compensation
WESTERN DIGITAL TECH INC10 citations80
US10818366B2Oct 27, 2020
Post write erase conditioning
WESTERN DIGITAL TECH INC1 citations72
US10553294B2Feb 4, 2020
Post write erase conditioning
WESTERN DIGITAL TECH INC2 citations72
US10269439B2Apr 23, 2019
Post write erase conditioning
WESTERN DIGITAL TECH INC1 citations72
US10535411B2Jan 14, 2020
System and method for string-based erase verify to create partial good blocks
WESTERN DIGITAL TECH INC0 citations42
CHEN CHANGYUAN
3 patentsUS8174895B2May 8, 2012
Programming non-volatile storage with fast bit detection and verify skip
CHEN CHANGYUAN29 citations91
US8456915B2Jun 4, 2013
Programming non-volatile storage with fast bit detection and verify skip
CHEN CHANGYUAN10 citations82
US8164135B2Apr 24, 2012
Non-diffusion junction split-gate nonvolatile memory cells and arrays, methods of programming, erasing, and reading thereof, and methods of manufacture
CHEN CHANGYUAN3 citations62