Inventor
CHETPUT CHANDRASHEKAR L
US17 patents
⚠️ This page may combine multiple inventors who share the name “CHETPUT CHANDRASHEKAR L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CADENCE DESIGN SYSTEMS INC
9 patentsUS7797659B2Sep 14, 2010
Analog/digital partitioning of circuit designs for simulation
CADENCE DESIGN SYSTEMS INC13 citations90
US7251795B2Jul 31, 2007
Connecting verilog-AMS and VHDL-AMS components in a mixed-language mixed-signal design
CADENCE DESIGN SYSTEMS INC10 citations81
US9501592B1Nov 22, 2016
Methods, systems, and articles of manufacture for implementing analog behavioral modeling and IP integration using systemverilog hardware description language
CADENCE DESIGN SYSTEMS INC7 citations79
US8732630B1May 20, 2014
Methods, systems, and articles of manufacture for implementing analog behavioral modeling and IP integration using systemverilog hardware description language
CADENCE DESIGN SYSTEMS INC9 citations79
US7260792B2Aug 21, 2007
Modeling a mixed-language mixed-signal design
CADENCE DESIGN SYSTEMS INC9 citations70
US8949753B1Feb 3, 2015
Methods, systems, and articles of manufacture for implementing analog behavioral modeling and IP integration using systemverilog hardware description language
CADENCE DESIGN SYSTEMS INC6 citations68
US7979262B1Jul 12, 2011
Method for verifying connectivity of electrical circuit components
CADENCE DESIGN SYSTEMS INC6 citations60
US11334704B1May 17, 2022
System, method, and computer program product for mixed signal verification
CADENCE DESIGN SYSTEMS INC0 citations54
US8640073B2Jan 28, 2014
Analog/digital partitioning of circuit designs for simulation
CADENCE DESIGN SYSTEMS INC0 citations50
CHETPUT CHANDRASHEKAR L
3 patentsUS8296699B1Oct 23, 2012
Method and system for supporting both analog and digital signal traffic on a single hierarchical connection for mixed-signal verification
CHETPUT CHANDRASHEKAR L21 citations90
US8234617B2Jul 31, 2012
Method and system for re-using digital assertions in a mixed signal design
CHETPUT CHANDRASHEKAR L16 citations82
US8448116B2May 21, 2013
Analog/digital partitioning of circuit designs for simulation
CHETPUT CHANDRASHEKAR L4 citations60
BHUSHAN PRANAV
3 patentsUS8201137B1Jun 12, 2012
Method and apparatus for AMS simulation of integrated circuit design
BHUSHAN PRANAV24 citations89
US8661402B2Feb 25, 2014
Method and apparatus for AMS simulation of integrated circuit design
BHUSHAN PRANAV8 citations80
US8578322B2Nov 5, 2013
Method and apparatus for AMS simulation of integrated circuit design
BHUSHAN PRANAV3 citations59
KOLPEKWAR ABHIJEET
2 patentsUS8255191B1Aug 28, 2012
Using real value models in simulation of analog and mixed-signal systems
KOLPEKWAR ABHIJEET12 citations81
US8504346B1Aug 6, 2013
Method and mechanism for performing mixed-signal simulation of electronic designs having complex digital signal types or models
KOLPEKWAR ABHIJEET3 citations60