Inventor

ONG ADRIAN E

US116 patents

⚠️ This page may combine multiple inventors who share the name “ONG ADRIAN E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ONG ADRIAN E

INAPAC TECHNOLOGY INC

Layout and use of bond pads and probe pads for testing of integrated circuits devices

Chip testing within a multi-chip semiconductor package

Integrated circuit testing module

Bonding pads for testing of a semiconductor device

Entering test mode and accessing of a packaged semiconductor device

Memory accessing circuit system

Integrated circuit testing module including address generator

Architecture and method for testing of an integrated circuit device

Integrated circuit testing module including data compression

Integrated circuit testing module including data generator

Internally generating patterns for testing in an integrated circuit device

Integrated circuit testing module including command driver

Electronic device having an interface supported testing mode

Integrated circuit test array including test module

Bonding pads for testing of a semiconductor device

Shared bond pad for testing a memory within a packaged semiconductor device

Multiple power levels for a chip within a multi-chip semiconductor package

Chip testing within a multi-chip semiconductor package

Monitoring signals between two integrated circuit devices within a single package

Testing of integrated circuit devices

Set up for a first integrated circuit chip to allow for testing of a co-packaged second integrated circuit chip

Testing of integrated circuit devices

Component testing and recovery

MICRON TECHNOLOGY INC

Method and apparatus for storage of test results within an integrated circuit

Burst EDO memory address counter

Method and apparatus for storage of test results within an integrated circuit

Efficient method for obtaining usable parts from a partially good memory integrated circuit

Circuit for cancelling and replacing redundant elements

Efficient method for obtaining usable parts from a partially good memory integrated circuit

Memory integrated circuits having on-chip topology logic driver, and methods for testing and producing such memory integrated circuits

Self current limiting antifuse circuit

Circuit for cancelling and replacing redundant elements

Efficient method for obtaining usable parts from a partially good memory integrated circuit

Supervoltage detection circuit having a multi-level reference voltage

Circuit for cancelling and replacing redundant elements

Two stage voltage level translator

Method and apparatus for checking the resistance of programmable elements

RAMBUS INC

Controller to detect malfunctioning address of memory device

Programmable memory repair scheme

Controller to detect malfunctioning address of memory device

Programmable memory repair scheme

Controller to detect malfunctioning address of memory device

Testing and recovery in a multilayer device

Memory device including multiplexed inputs

ONG ADRIAN E

Multi-cell per memory-bit circuit and method

Programmable memory repair scheme

Memory write error correction circuit

(unassigned)

Dynamic random access memory having decoding circuitry for partial memory blocks

Circuit for cancelling and replacing redundant elements

NEOMAGIC CORP

NMOS dynamic content-addressable-memory CAM cell with self-booting pass transistors and local row and column select