Inventor

YU JIXIN

US31 patents

⚠️ This page may combine multiple inventors who share the name “YU JIXIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YU JIXIN

SANDISK TECHNOLOGIES LLC

Through-memory-level via structures for a three-dimensional memory device

Through-memory-level via structures for a three-dimensional memory device

Bulb-shaped memory stack structures for direct source contact in three-dimensional memory device

Bulb-shaped memory stack structures for direct source contact in three-dimensional memory device

Bulb-shaped memory stack structures for direct source contact in three-dimensional memory device

Through-memory-level via structures for a three-dimensional memory device

Multi-tier memory device with through-stack peripheral contact via structures and method of making thereof

Through-memory-level via structures between staircase regions in a three-dimensional memory device and method of making thereof

Within-array through-memory-level via structures and method of making thereof

Bulb-shaped memory stack structures for direct source contact in three-dimensional memory device

Three-dimensional memory device having L-shaped word lines and a support structure and methods of making the same

Three-dimensional memory device including backside trench support structures and methods of forming the same

Three-dimensional memory device including self-aligned dielectric isolation regions for connection via structures and method of making the same

Method of forming a staircase in a semiconductor device using a linear alignment control feature

Three-dimensional memory device having bonding structures connected to bit lines and methods of making the same

Memory die having wafer warpage reduction through stress balancing employing rotated three-dimensional memory arrays and method of making the same

Three-dimensional memory device containing hydrogen diffusion barrier structures for CMOS under array architecture and method of making the same

Three-dimensional memory device containing asymmetric, different size support pillars and method for making the same

Self-aligned isolation dielectric structures for a three-dimensional memory device

Memory die containing stress reducing backside contact via structures and method of making the same

Word line contact regions for three-dimensional non-volatile memory

Three-dimensional memory device with enhanced mechanical stability semiconductor pedestal and method of making thereof

Three-dimensional memory device with finned support pillar structures and method of forming the same

Three-dimensional memory device having bonding structures connected to bit lines and methods of making the same

SANDISK TECHNOLOGIES INC

Three dimensional memory device with peripheral devices under dummy dielectric layer stack and method of making thereof

Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistors

Multi-tier replacement memory stack structure integration scheme

Three dimensional memory device containing discrete silicon nitride charge storage regions

MICRON TECHNOLOGY INC

Methods of forming semiconductor device structures including stair step structures

Methods of semiconductor processing involving forming doped polysilicon on undoped polysilicon

Semiconductor device structures including stair step structures, and related semiconductor devices