Inventor

DAUBENSPECK TIMOTHY H

US133 patents

⚠️ This page may combine multiple inventors who share the name “DAUBENSPECK TIMOTHY H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DAUBENSPECK TIMOTHY H

IBM

Electrical interconnection structure formation

Bilayer metallization cap for photolithography

Post-fuse blow corrosion prevention structure for copper fuses

Crack stop for low K dielectrics

Undercut-free BLM process for Pb-free and Pb-reduced C4

Undercut-free BLM process for Pb-free and Pb-reduced C4

Solder bumps in flip-chip technologies

Damascene patterning of barrier layer metal for C4 solder bumps

Chip dicing

Chip dicing

Electrical detection of dicing damage

Post-fuse blow corrosion prevention structure for copper fuses

Triple damascene fuse

High laser absorption copper fuse and method for making the same

Post bump passivation for soft error protection

Antifuse for use with low k dielectric foam insulators

Pedestal fuse

Semiconductor chip having a chip metal layer and a transfer metal and corresponding electronic module

Crack stop for low K dielectrics

Chlorofluorocarbon additives for enhancing etch rates in fluorinated halocarbon/oxidant plasmas

Compensating for warpage of a flip chip package by varying heights of a redistribution layer on an integrated circuit chip

Coplanar waveguide for stacked multi-chip systems

IC chip package having IC chip with overhang and/or BGA blocking underfill material flow and related methods

Structures and methods for improving solder bump connections in semiconductor devices

Method for forming C4 connections on integrated circuit chips and the resulting devices

Wire and solder bond forming methods

Damascene patterning of barrier layer metal for C4 solder bumps

Prevention of backside cracks in semiconductor chips or wafers using backside film or backside wet etch

Chip dicing

Overcoming chip warping to enhance wetting of solder bumps and flip chip attaches in a flip chip package

Method of forming a crack stop void in a low-k dielectric layer between adjacent fuses

Methods of forming solder connections and structure thereof

Thinning of fuse passivation after C4 formation

Insulative cap for laser fusing

Thinning of fuse passivation after C4 formation

Insulated cube with exposed wire lead

DAUBENSPECK TIMOTHY H

Structure and method of making an offset-trench crackstop that forms an air gap adjacent to a passivated metal crackstop

Metal pad structure for thickness enhancement of polymer used in electrical interconnection of semiconductor die to semiconductor chip package substrate with solder bump

Ni plating of a BLM edge for Pb-free C4 undercut control

Combination via and pad structure for improved solder bump electromigration characteristics

Structures and methods to improve lead-free C4 interconnect reliability

Underfill flow guide structures

Chip package solder interconnect formed by surface tension

Solder bump connections

ARVIN CHARLES L

Structures for improving current carrying capability of interconnects and methods of fabricating the same

Solder interconnect with non-wettable sidewall pillars and methods of manufacture

Undercut-repair of barrier layer metallurgy for solder bumps and methods thereof

ANDRY PAUL S

Process for wet singulation using a dicing singulation structure

ANDERSON FELIX P

System and method for forming aluminum fuse for compatibility with copper BEOL interconnect scheme

BANACH ALBERT J

Chip identification for organic laminate packaging and methods of manufacture