P

Inventor

SHEKHAR SAMEER

US17 patents

Patents

17 patents
US11133256B2Sep 28, 2021

Embedded bridge substrate having an integral device

INTEL CORP12 citations83
US11175709B2Nov 16, 2021

Per chiplet thermal control in a disaggregated multi-chiplet system

INTEL CORP2 citations67
US12057433B2Aug 6, 2024

EM and RF mitigation silicon structures in stacked die microprocessors for die to platform and die-die RF noise suppression

INTEL CORP0 citations62
US10453705B2Oct 22, 2019

Multi-voltage apparatus for electronics package including magnetic inductor and capacitor and manufacturing thereof

INTEL CORP1 citations62
US11502603B2Nov 15, 2022

Magnetic sensing scheme for voltage regulator circuit

INTEL CORP0 citations61
US11437294B2Sep 6, 2022

Structures to facilitate heat transfer within package layers to thermal heat sink and motherboard

INTEL CORP0 citations61
US11380623B2Jul 5, 2022

Shield to protect vias from electromagnetic interference

INTEL CORP0 citations61
US11342852B2May 24, 2022

Apparatus, system, and method for reducing voltage overshoot in voltage regulators

INTEL CORP0 citations61
US11749606B2Sep 5, 2023

Embedded bridge substrate having an integral device

INTEL CORP0 citations59
US11429172B2Aug 30, 2022

Digital linear regulator clamping method and apparatus

INTEL CORP0 citations58
US12474759B2Nov 18, 2025

Platform voltage regulator circuitry configurations

INTEL CORP0 citations51
US11562963B2Jan 24, 2023

Stacked semiconductor package and method of forming the same

INTEL CORP0 citations51
US10719109B2Jul 21, 2020

Noise mitigation apparatus and method with positively and negatively coupled inductors

INTEL CORP0 citations51
US10014692B2Jul 3, 2018

Apparatuses, methods, and systems with cross-coupling noise reduction

INTEL CORP0 citations51
US10972001B2Apr 6, 2021

Multi-terminal inductors for voltage regulators

INTEL CORP0 citations49
US9813046B2Nov 7, 2017

Embedded buffer circuit compensation scheme for integrated circuits

INTEL CORP0 citations45
US10541615B1Jan 21, 2020

Device, method and system to mitigate a voltage overshoot event

INTEL CORP0 citations41